History log of /vpp/src/vppinfra/bihash_24_8.h
Revision Date Author Comments
# 16e4a4a0 16-Apr-2020 Dave Barach <dave@barachs.net>

vppinfra: bihash improvements

Template instances can allocate BIHASH_KVP_PER_PAGE data records
tangent to the bucket, to remove a dependent read / prefetch.

Template instances can ask for immediate memory allocation, to avoid
several branches in the lookup path.

Clean up l2 fib, gpb plugin codes: use clib_bihash_get_bucket(...)

Use hugepages for bihash allocation arenas

Type: improvement

Signed-off-by: Dave Barach <dave@barachs.net>
Signed-off-by: Damjan Marion <damarion@cisco.com>
Change-Id: I92fc11bc58e48d84e2d61f44580916dd1c56361c

# 2ce28d60 03-May-2019 Dave Barach <dave@barachs.net>

Add bihash statistics hook

Example / unit-test in .../src/plugins/unittest/bihash_test.c

Change-Id: I23fd0ba742d65291667a755965aee1a3d3477ca2
Signed-off-by: Dave Barach <dave@barachs.net>

# b7b92993 17-Oct-2018 Dave Barach <dave@barachs.net>

c11 safe string handling support

Change-Id: Ied34720ca5a6e6e717eea4e86003e854031b6eab
Signed-off-by: Dave Barach <dave@barachs.net>

# 508498f7 19-Jul-2018 Dave Barach <dave@barachs.net>

Fine-grained add / delete locking

Add a bucket-level lock bit. Use a spinlock only when actually
allocating, freeing, or splitting a bucket. Should improve
multi-thread add/del performance.

Change-Id: I3e40e2a8371685457f340d6584dea14e3207f2b0
Signed-off-by: Dave Barach <dave@barachs.net>

# 09fdf9d0 28-Jun-2018 Damjan Marion <damarion@cisco.com>

bihash key compare improvements

Looks like CPU doesn't like overlaping loads.
This new codes in some cases shows 3-4 clock improvements.

Change-Id: Ia1b49976ad95140c573f892fdc0a32eebbfa06c8
Signed-off-by: Damjan Marion <damarion@cisco.com>

# 1cf9a165 23-May-2018 Damjan Marion <damarion@cisco.com>

Vectorized bihash_{48,40,24,16}_8 key compare

bihash_48_8 case:
Scalar code: 6 clocks
SSE4.2 code: 3 clocks
AVX2 code: 2.27 clocks
AVX512 code: 1.5 clocks

Change-Id: I40700175835a1e7321276e47eadbf9771d3c5a68
Signed-off-by: Damjan Marion <damarion@cisco.com>

# b7f1faa7 29-Aug-2017 Dave Barach <dave@barachs.net>

Add fixed-size, preallocated pool support

Simply call pool_init_fixed(...) before using the pool. Note that
fixed, preallocated pools live in individually-mmap'ed address
segments, except for the free element bitmap. A large fixed pool can
exceed 4gb.

Fix tcp buffer allocator leak, remove broken assert

Change-Id: I4421082e12a77c41c6e20f7747f3150dcd01fc26
Signed-off-by: Dave Barach <dave@barachs.net>

# 908a5ea6 14-Jul-2017 Dave Barach <dave@barachs.net>

Add a bihash prefetchable bucket-level cache

According to Maciek, the easiest way to leverage the csit "performance
trend" job is to actually merge the patch once verified. Manual
testing indicates that the patch improves l2 path performance. Other
use-cases are TBD. It's possible that we'll need to back out the patch
depending on what happens.

Change-Id: Ic0a0363de35ef9be953ad7709c57c3936b73fd5a
Signed-off-by: Dave Barach <dave@barachs.net>

# b4bd28a4 31-May-2017 Christophe Fontaine <christophe.fontaine@enea.com>

Remove calls to crc_u32 and add clib_crc32c for armv8+crc

crc_u32 was not defined for non x86_64 with SSE4.2 processors.

Calls to "crc_u32" are removed and replaced by either a call to
clib_crc32c or a call to clib_xxhash, as the result is not used
as a check value but as a hash.

Change-Id: I3af4d68e2e5ebd0c9b0a6090f848d043cb0f20a2
Signed-off-by: Christophe Fontaine <christophe.fontaine@enea.com>

# 0f68c79a 26-Apr-2017 Damjan Marion <damarion@cisco.com>

Add crc32c inline function, allows compilation on 32-bit systems

32-bit code still can use crc32c instructions, but it operates
on 32 registers

Change-Id: I9bb6b0b59635d6ea6a753584676ebcf59c8f6584
Signed-off-by: Damjan Marion <damarion@cisco.com>

# 7cd468a3 19-Dec-2016 Damjan Marion <damarion@cisco.com>

Reorganize source tree to use single autotools instance

Change-Id: I7b51f88292e057c6443b12224486f2d0c9f8ae23
Signed-off-by: Damjan Marion <damarion@cisco.com>