History log of /vpp/src/vppinfra/bihash_8_8.h
Revision Date Author Comments
# 16e4a4a0 16-Apr-2020 Dave Barach <dave@barachs.net>

vppinfra: bihash improvements

Template instances can allocate BIHASH_KVP_PER_PAGE data records
tangent to the bucket, to remove a dependent read / prefetch.

Template instances can ask for immediate memory allocation, to avoid
several branches in the lookup path.

Clean up l2 fib, gpb plugin codes: use clib_bihash_get_bucket(...)

Use hugepages for bihash allocation arenas

Type: improvement

Signed-off-by: Dave Barach <dave@barachs.net>
Signed-off-by: Damjan Marion <damarion@cisco.com>
Change-Id: I92fc11bc58e48d84e2d61f44580916dd1c56361c


# 2ce28d60 03-May-2019 Dave Barach <dave@barachs.net>

Add bihash statistics hook

Example / unit-test in .../src/plugins/unittest/bihash_test.c

Change-Id: I23fd0ba742d65291667a755965aee1a3d3477ca2
Signed-off-by: Dave Barach <dave@barachs.net>


# 508498f7 19-Jul-2018 Dave Barach <dave@barachs.net>

Fine-grained add / delete locking

Add a bucket-level lock bit. Use a spinlock only when actually
allocating, freeing, or splitting a bucket. Should improve
multi-thread add/del performance.

Change-Id: I3e40e2a8371685457f340d6584dea14e3207f2b0
Signed-off-by: Dave Barach <dave@barachs.net>


# c8ef08ac 31-Aug-2017 Dave Barach <dbarach@cisco.com>

Fix BIHASH_KVP_CACHE_SIZE == 0 case

Setting the bucket-level LRU cache size to zero removes the
bucket-level LRU cache code.

Change-Id: Idf2e63d0d508675e957366515863766f79a3479c
Signed-off-by: Dave Barach <dbarach@cisco.com>


# 908a5ea6 14-Jul-2017 Dave Barach <dave@barachs.net>

Add a bihash prefetchable bucket-level cache

According to Maciek, the easiest way to leverage the csit "performance
trend" job is to actually merge the patch once verified. Manual
testing indicates that the patch improves l2 path performance. Other
use-cases are TBD. It's possible that we'll need to back out the patch
depending on what happens.

Change-Id: Ic0a0363de35ef9be953ad7709c57c3936b73fd5a
Signed-off-by: Dave Barach <dave@barachs.net>


# e2d40b81 10-Jul-2017 Christophe Fontaine <christophe.fontaine@enea.com>

Use clib_crc32c_uses_intrinsics instead of __SSE4_2__

clib_crc32c is not limited to x86 platforms.

Change-Id: I5f6d5fdd4af80f9fe696d3317453fa58760df1db
Signed-off-by: Christophe Fontaine <christophe.fontaine@enea.com>


# 0f68c79a 26-Apr-2017 Damjan Marion <damarion@cisco.com>

Add crc32c inline function, allows compilation on 32-bit systems

32-bit code still can use crc32c instructions, but it operates
on 32 registers

Change-Id: I9bb6b0b59635d6ea6a753584676ebcf59c8f6584
Signed-off-by: Damjan Marion <damarion@cisco.com>


# 5e6b9580 12-Dec-2016 Dave Barach <dave@barachs.net>

Handle execessive hash collisions, VPP-555

Change-Id: I55dad7b5cfb3d38c22b1105f7d2d61e7449410ea
Signed-off-by: Dave Barach <dave@barachs.net>


# 7cd468a3 19-Dec-2016 Damjan Marion <damarion@cisco.com>

Reorganize source tree to use single autotools instance

Change-Id: I7b51f88292e057c6443b12224486f2d0c9f8ae23
Signed-off-by: Damjan Marion <damarion@cisco.com>