Searched refs:offset (Results 1 - 25 of 223) sorted by relevance

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/trex/src/dpdk/lib/librte_port/
H A Drte_port.h57 #define RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset) \
58 (&((uint8_t *)(mbuf))[offset])
59 #define RTE_MBUF_METADATA_UINT16_PTR(mbuf, offset) \
60 ((uint16_t *) RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
61 #define RTE_MBUF_METADATA_UINT32_PTR(mbuf, offset) \
62 ((uint32_t *) RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
63 #define RTE_MBUF_METADATA_UINT64_PTR(mbuf, offset) \
64 ((uint64_t *) RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
66 #define RTE_MBUF_METADATA_UINT8(mbuf, offset) \
67 (*RTE_MBUF_METADATA_UINT8_PTR(mbuf, offset))
[all...]
/trex/src/dpdk/lib/librte_ether/
H A Drte_dev_info.h44 uint32_t offset; /**< Start register table location for access */ member in struct:rte_dev_reg_info
55 uint32_t offset; /**< Start eeprom address for access*/ member in struct:rte_dev_eeprom_info
/trex/src/dpdk/lib/librte_table/
H A Drte_table_array.h58 /** Byte offset within input packet meta-data where lookup key (i.e. the
60 uint32_t offset; member in struct:rte_table_array_params
H A Drte_table_lpm.h96 /** Byte offset within input packet meta-data where lookup key (i.e.
98 uint32_t offset; member in struct:rte_table_lpm_params
H A Drte_table_lpm_ipv6.h94 /** Byte offset within input packet meta-data where lookup key (i.e.
96 uint32_t offset; member in struct:rte_table_lpm_ipv6_params
/trex/src/dpdk/lib/librte_eal/linuxapp/kni/ethtool/igb/
H A De1000_osdep.h99 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \
100 writel((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2))))
102 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
103 readl((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 2)))
108 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
109 writew((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1))))
111 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
112 readw((a)->hw_addr + E1000_REGISTER(a, reg) + ((offset) << 1)))
114 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
115 writeb((value), ((a)->hw_addr + E1000_REGISTER(a, reg) + (offset))))
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H A De1000_phy.h32 s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);
35 s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);
64 s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);
65 s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);
67 s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
68 s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);
69 s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
72 s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data);
73 s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data);
74 s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u1
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/trex/src/dpdk/drivers/net/e1000/base/
H A De1000_phy.h38 s32 e1000_null_read_reg(struct e1000_hw *hw, u32 offset, u16 *data);
41 s32 e1000_null_write_reg(struct e1000_hw *hw, u32 offset, u16 data);
72 s32 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data);
73 s32 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);
75 s32 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
76 s32 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);
77 s32 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
80 s32 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data);
81 s32 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data);
82 s32 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u1
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H A De1000_phy.c37 STATIC s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
40 STATIC s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
119 u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG *data)
122 UNREFERENCED_3PARAMETER(hw, offset, data);
154 u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG data)
157 UNREFERENCED_3PARAMETER(hw, offset, data);
164 * @byte_offset: byte offset to write
182 * @byte_offset: byte offset to write
284 * @offset: register offset t
118 e1000_null_read_reg(struct e1000_hw E1000_UNUSEDARG *hw, u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG *data) argument
153 e1000_null_write_reg(struct e1000_hw E1000_UNUSEDARG *hw, u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG data) argument
290 e1000_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data) argument
355 e1000_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data) argument
421 e1000_read_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 *data) argument
468 e1000_write_phy_reg_i2c(struct e1000_hw *hw, u32 offset, u16 data) argument
529 e1000_read_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 *data) argument
584 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data) argument
654 e1000_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data) argument
684 e1000_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data) argument
736 __e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data, bool locked) argument
776 e1000_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) argument
790 e1000_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data) argument
805 __e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data, bool locked) argument
844 e1000_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) argument
858 e1000_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data) argument
874 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, bool locked) argument
918 e1000_read_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 *data) argument
933 e1000_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data) argument
949 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, bool locked) argument
989 e1000_write_kmrn_reg_generic(struct e1000_hw *hw, u32 offset, u16 data) argument
1003 e1000_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data) argument
2170 u16 phy_data, offset, mask; local
2242 u16 data, offset, mask; local
2285 u16 phy_data, offset, mask; local
3118 e1000_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) argument
3178 e1000_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) argument
3237 e1000_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data) argument
3282 e1000_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) argument
3435 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data, bool read, bool page_set) argument
3538 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, bool locked, bool page_set) argument
3604 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) argument
3618 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data) argument
3632 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data) argument
3647 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, bool locked, bool page_set) argument
3729 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) argument
3743 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data) argument
3757 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data) argument
3788 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, u16 *data, bool read) argument
4051 e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data) argument
4083 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data) argument
[all...]
/trex/scripts/external_libs/pyzmq-14.5.0/python2/ucs2/32bit/zmq/utils/
H A Dpyversion_compat.h20 #define PyBuffer_FromObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
22 #define PyBuffer_FromReadWriteObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
H A Dz85.py35 for offset in _85s:
36 encoded.append(Z85CHARS[(v // offset) % 85])
53 for j, offset in enumerate(_85s):
54 value += Z85MAP[z85bytes[i+j]] * offset
/trex/scripts/external_libs/pyzmq-14.5.0/python2/ucs2/64bit/zmq/utils/
H A Dpyversion_compat.h20 #define PyBuffer_FromObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
22 #define PyBuffer_FromReadWriteObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
H A Dz85.py35 for offset in _85s:
36 encoded.append(Z85CHARS[(v // offset) % 85])
53 for j, offset in enumerate(_85s):
54 value += Z85MAP[z85bytes[i+j]] * offset
/trex/scripts/external_libs/pyzmq-14.5.0/python2/ucs4/64bit/zmq/utils/
H A Dpyversion_compat.h20 #define PyBuffer_FromObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
22 #define PyBuffer_FromReadWriteObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
H A Dz85.py35 for offset in _85s:
36 encoded.append(Z85CHARS[(v // offset) % 85])
53 for j, offset in enumerate(_85s):
54 value += Z85MAP[z85bytes[i+j]] * offset
/trex/scripts/external_libs/pyzmq-14.5.0/python3/ucs4/32bit/zmq/utils/
H A Dpyversion_compat.h20 #define PyBuffer_FromObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
22 #define PyBuffer_FromReadWriteObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
H A Dz85.py35 for offset in _85s:
36 encoded.append(Z85CHARS[(v // offset) % 85])
53 for j, offset in enumerate(_85s):
54 value += Z85MAP[z85bytes[i+j]] * offset
/trex/scripts/external_libs/pyzmq-14.5.0/python3/ucs4/64bit/zmq/utils/
H A Dpyversion_compat.h20 #define PyBuffer_FromObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
22 #define PyBuffer_FromReadWriteObject(object, offset, size) (PyErr_SetString(PyExc_NotImplementedError, \
H A Dz85.py35 for offset in _85s:
36 encoded.append(Z85CHARS[(v // offset) % 85])
53 for j, offset in enumerate(_85s):
54 value += Z85MAP[z85bytes[i+j]] * offset
/trex/src/dpdk/drivers/net/szedata2/
H A Drte_eth_szedata2.h117 * @return Byte from PCI resource at offset "offset".
120 pci_resource_read8(struct rte_mem_resource *rsc, uint32_t offset) argument
122 return *((uint8_t *)((uint8_t *)rsc->addr + offset));
126 * @return Two bytes from PCI resource starting at offset "offset".
129 pci_resource_read16(struct rte_mem_resource *rsc, uint32_t offset) argument
132 offset)));
136 * @return Four bytes from PCI resource starting at offset "offset"
139 pci_resource_read32(struct rte_mem_resource *rsc, uint32_t offset) argument
149 pci_resource_read64(struct rte_mem_resource *rsc, uint32_t offset) argument
159 pci_resource_write8(struct rte_mem_resource *rsc, uint32_t offset, uint8_t val) argument
168 pci_resource_write16(struct rte_mem_resource *rsc, uint32_t offset, uint16_t val) argument
178 pci_resource_write32(struct rte_mem_resource *rsc, uint32_t offset, uint32_t val) argument
188 pci_resource_write64(struct rte_mem_resource *rsc, uint32_t offset, uint64_t val) argument
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/trex/src/common/Network/Packet/
H A DVLANHeader.cpp81 uint32_t offset = 0;
82 while (offset < size)
85 vlanHeader.setFromPkt(&srcBuffer[2+offset]);
89 offset += sizeof(VLANHeader);
/trex/src/dpdk/drivers/net/ixgbe/base/
H A Dixgbe_x540.h49 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);
50 s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
52 s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data);
53 s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
/trex/src/dpdk/lib/librte_eal/linuxapp/eal/
H A Deal_pci_init.h70 void *data, size_t len, off_t offset);
72 const void *data, size_t len, off_t offset);
86 void *data, size_t len, off_t offset);
88 const void *data, size_t len, off_t offset);
/trex/src/dpdk/lib/librte_eal/linuxapp/kni/ethtool/ixgbe/
H A Dixgbe_x540.h43 s32 ixgbe_read_eerd_X540(struct ixgbe_hw *hw, u16 offset, u16 *data);
44 s32 ixgbe_read_eerd_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
46 s32 ixgbe_write_eewr_X540(struct ixgbe_hw *hw, u16 offset, u16 data);
47 s32 ixgbe_write_eewr_buffer_X540(struct ixgbe_hw *hw, u16 offset, u16 words,
/trex/src/dpdk/drivers/net/i40e/base/
H A Di40e_dcb.c71 u16 offset = 0; local
83 etscfg->willing = (u8)((buf[offset] & I40E_IEEE_ETS_WILLING_MASK) >>
85 etscfg->cbs = (u8)((buf[offset] & I40E_IEEE_ETS_CBS_MASK) >>
87 etscfg->maxtcs = (u8)((buf[offset] & I40E_IEEE_ETS_MAXTC_MASK) >>
90 /* Move offset to Priority Assignment Table */
91 offset++;
102 priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_1_MASK) >>
105 priority = (u8)((buf[offset] & I40E_IEEE_ETS_PRIO_0_MASK) >>
108 offset++;
118 etscfg->tcbwtable[i] = buf[offset
141 u16 offset = 0; local
223 u16 offset = 0; local
313 u16 offset = 0; local
388 u16 length, typelength, offset = 0; local
535 u16 offset = 0; local
962 u16 offset = 0, typelength, i; local
1036 u16 offset = 0, typelength, i; local
1137 u16 typelength, length, offset = 0; local
1250 u16 length, offset = 0, tlvid = I40E_TLV_ID_START; local
1288 u32 offset = (2 * I40E_NVM_LLDP_CFG_PTR); local
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