139157ec0SLuca Boccassi/*-
239157ec0SLuca Boccassi *   BSD LICENSE
339157ec0SLuca Boccassi *
439157ec0SLuca Boccassi *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
539157ec0SLuca Boccassi *   Copyright(c) 2017 IBM Corporation.
639157ec0SLuca Boccassi *   All rights reserved.
739157ec0SLuca Boccassi *
839157ec0SLuca Boccassi *   Redistribution and use in source and binary forms, with or without
939157ec0SLuca Boccassi *   modification, are permitted provided that the following conditions
1039157ec0SLuca Boccassi *   are met:
1139157ec0SLuca Boccassi *
1239157ec0SLuca Boccassi *     * Redistributions of source code must retain the above copyright
1339157ec0SLuca Boccassi *       notice, this list of conditions and the following disclaimer.
1439157ec0SLuca Boccassi *     * Redistributions in binary form must reproduce the above copyright
1539157ec0SLuca Boccassi *       notice, this list of conditions and the following disclaimer in
1639157ec0SLuca Boccassi *       the documentation and/or other materials provided with the
1739157ec0SLuca Boccassi *       distribution.
1839157ec0SLuca Boccassi *     * Neither the name of Intel Corporation nor the names of its
1939157ec0SLuca Boccassi *       contributors may be used to endorse or promote products derived
2039157ec0SLuca Boccassi *       from this software without specific prior written permission.
2139157ec0SLuca Boccassi *
3339157ec0SLuca Boccassi */
3439157ec0SLuca Boccassi
3539157ec0SLuca Boccassi#include <stdint.h>
3639157ec0SLuca Boccassi#include <rte_ethdev.h>
3739157ec0SLuca Boccassi#include <rte_malloc.h>
3839157ec0SLuca Boccassi
3939157ec0SLuca Boccassi#include "base/i40e_prototype.h"
4039157ec0SLuca Boccassi#include "base/i40e_type.h"
4139157ec0SLuca Boccassi#include "i40e_ethdev.h"
4239157ec0SLuca Boccassi#include "i40e_rxtx.h"
4339157ec0SLuca Boccassi#include "i40e_rxtx_vec_common.h"
4439157ec0SLuca Boccassi
4539157ec0SLuca Boccassi#include <altivec.h>
4639157ec0SLuca Boccassi
4739157ec0SLuca Boccassi#pragma GCC diagnostic ignored "-Wcast-qual"
4839157ec0SLuca Boccassi
4939157ec0SLuca Boccassistatic inline void
5039157ec0SLuca Boccassii40e_rxq_rearm(struct i40e_rx_queue *rxq)
5139157ec0SLuca Boccassi{
5239157ec0SLuca Boccassi	int i;
5339157ec0SLuca Boccassi	uint16_t rx_id;
5439157ec0SLuca Boccassi	volatile union i40e_rx_desc *rxdp;
5539157ec0SLuca Boccassi
5639157ec0SLuca Boccassi	struct i40e_rx_entry *rxep = &rxq->sw_ring[rxq->rxrearm_start];
5739157ec0SLuca Boccassi	struct rte_mbuf *mb0, *mb1;
5839157ec0SLuca Boccassi
5939157ec0SLuca Boccassi	vector unsigned long hdr_room = (vector unsigned long){
6039157ec0SLuca Boccassi						RTE_PKTMBUF_HEADROOM,
6139157ec0SLuca Boccassi						RTE_PKTMBUF_HEADROOM};
6239157ec0SLuca Boccassi	vector unsigned long dma_addr0, dma_addr1;
6339157ec0SLuca Boccassi
6439157ec0SLuca Boccassi	rxdp = rxq->rx_ring + rxq->rxrearm_start;
6539157ec0SLuca Boccassi
6639157ec0SLuca Boccassi	/* Pull 'n' more MBUFs into the software ring */
6739157ec0SLuca Boccassi	if (rte_mempool_get_bulk(rxq->mp,
6839157ec0SLuca Boccassi				 (void *)rxep,
6939157ec0SLuca Boccassi				 RTE_I40E_RXQ_REARM_THRESH) < 0) {
7039157ec0SLuca Boccassi		if (rxq->rxrearm_nb + RTE_I40E_RXQ_REARM_THRESH >=
7139157ec0SLuca Boccassi		    rxq->nb_rx_desc) {
7239157ec0SLuca Boccassi			dma_addr0 = (vector unsigned long){};
7339157ec0SLuca Boccassi			for (i = 0; i < RTE_I40E_DESCS_PER_LOOP; i++) {
7439157ec0SLuca Boccassi				rxep[i].mbuf = &rxq->fake_mbuf;
7539157ec0SLuca Boccassi				vec_st(dma_addr0, 0,
7639157ec0SLuca Boccassi				       (vector unsigned long *)&rxdp[i].read);
7739157ec0SLuca Boccassi			}
7839157ec0SLuca Boccassi		}
7939157ec0SLuca Boccassi		rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed +=
8039157ec0SLuca Boccassi			RTE_I40E_RXQ_REARM_THRESH;
8139157ec0SLuca Boccassi		return;
8239157ec0SLuca Boccassi	}
8339157ec0SLuca Boccassi
8439157ec0SLuca Boccassi	/* Initialize the mbufs in vector, process 2 mbufs in one loop */
8539157ec0SLuca Boccassi	for (i = 0; i < RTE_I40E_RXQ_REARM_THRESH; i += 2, rxep += 2) {
8639157ec0SLuca Boccassi		vector unsigned long vaddr0, vaddr1;
8739157ec0SLuca Boccassi		uintptr_t p0, p1;
8839157ec0SLuca Boccassi
8939157ec0SLuca Boccassi		mb0 = rxep[0].mbuf;
9039157ec0SLuca Boccassi		mb1 = rxep[1].mbuf;
9139157ec0SLuca Boccassi
9239157ec0SLuca Boccassi		 /* Flush mbuf with pkt template.
9339157ec0SLuca Boccassi		  * Data to be rearmed is 6 bytes long.
9439157ec0SLuca Boccassi		  * Though, RX will overwrite ol_flags that are coming next
9539157ec0SLuca Boccassi		  * anyway. So overwrite whole 8 bytes with one load:
9639157ec0SLuca Boccassi		  * 6 bytes of rearm_data plus first 2 bytes of ol_flags.
9739157ec0SLuca Boccassi		  */
9839157ec0SLuca Boccassi		p0 = (uintptr_t)&mb0->rearm_data;
9939157ec0SLuca Boccassi		*(uint64_t *)p0 = rxq->mbuf_initializer;
10039157ec0SLuca Boccassi		p1 = (uintptr_t)&mb1->rearm_data;
10139157ec0SLuca Boccassi		*(uint64_t *)p1 = rxq->mbuf_initializer;
10239157ec0SLuca Boccassi
10339157ec0SLuca Boccassi		/* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */
10439157ec0SLuca Boccassi		vaddr0 = vec_ld(0, (vector unsigned long *)&mb0->buf_addr);
10539157ec0SLuca Boccassi		vaddr1 = vec_ld(0, (vector unsigned long *)&mb1->buf_addr);
10639157ec0SLuca Boccassi
10739157ec0SLuca Boccassi		/* convert pa to dma_addr hdr/data */
10839157ec0SLuca Boccassi		dma_addr0 = vec_mergel(vaddr0, vaddr0);
10939157ec0SLuca Boccassi		dma_addr1 = vec_mergel(vaddr1, vaddr1);
11039157ec0SLuca Boccassi
11139157ec0SLuca Boccassi		/* add headroom to pa values */
11239157ec0SLuca Boccassi		dma_addr0 = vec_add(dma_addr0, hdr_room);
11339157ec0SLuca Boccassi		dma_addr1 = vec_add(dma_addr1, hdr_room);
11439157ec0SLuca Boccassi
11539157ec0SLuca Boccassi		/* flush desc with pa dma_addr */
11639157ec0SLuca Boccassi		vec_st(dma_addr0, 0, (vector unsigned long *)&rxdp++->read);
11739157ec0SLuca Boccassi		vec_st(dma_addr1, 0, (vector unsigned long *)&rxdp++->read);
11839157ec0SLuca Boccassi	}
11939157ec0SLuca Boccassi
12039157ec0SLuca Boccassi	rxq->rxrearm_start += RTE_I40E_RXQ_REARM_THRESH;
12139157ec0SLuca Boccassi	if (rxq->rxrearm_start >= rxq->nb_rx_desc)
12239157ec0SLuca Boccassi		rxq->rxrearm_start = 0;
12339157ec0SLuca Boccassi
12439157ec0SLuca Boccassi	rxq->rxrearm_nb -= RTE_I40E_RXQ_REARM_THRESH;
12539157ec0SLuca Boccassi
12639157ec0SLuca Boccassi	rx_id = (uint16_t)((rxq->rxrearm_start == 0) ?
12739157ec0SLuca Boccassi			     (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1));
12839157ec0SLuca Boccassi
12939157ec0SLuca Boccassi	/* Update the tail pointer on the NIC */
13039157ec0SLuca Boccassi	I40E_PCI_REG_WRITE(rxq->qrx_tail, rx_id);
13139157ec0SLuca Boccassi}
13239157ec0SLuca Boccassi
13339157ec0SLuca Boccassi/* Handling the offload flags (olflags) field takes computation
13439157ec0SLuca Boccassi * time when receiving packets. Therefore we provide a flag to disable
13539157ec0SLuca Boccassi * the processing of the olflags field when they are not needed. This
13639157ec0SLuca Boccassi * gives improved performance, at the cost of losing the offload info
13739157ec0SLuca Boccassi * in the received packet
13839157ec0SLuca Boccassi */
13939157ec0SLuca Boccassi#ifdef RTE_LIBRTE_I40E_RX_OLFLAGS_ENABLE
14039157ec0SLuca Boccassi
14139157ec0SLuca Boccassistatic inline void
14239157ec0SLuca Boccassidesc_to_olflags_v(vector unsigned long descs[4], struct rte_mbuf **rx_pkts)
14339157ec0SLuca Boccassi{
14439157ec0SLuca Boccassi	vector unsigned int vlan0, vlan1, rss, l3_l4e;
14539157ec0SLuca Boccassi
14639157ec0SLuca Boccassi	/* mask everything except RSS, flow director and VLAN flags
14739157ec0SLuca Boccassi	 * bit2 is for VLAN tag, bit11 for flow director indication
14839157ec0SLuca Boccassi	 * bit13:12 for RSS indication.
14939157ec0SLuca Boccassi	 */
15039157ec0SLuca Boccassi	const vector unsigned int rss_vlan_msk = (vector unsigned int){
15139157ec0SLuca Boccassi			(int32_t)0x1c03804, (int32_t)0x1c03804,
15239157ec0SLuca Boccassi			(int32_t)0x1c03804, (int32_t)0x1c03804};
15339157ec0SLuca Boccassi
15439157ec0SLuca Boccassi	/* map rss and vlan type to rss hash and vlan flag */
15539157ec0SLuca Boccassi	const vector unsigned char vlan_flags = (vector unsigned char){
15639157ec0SLuca Boccassi			0, 0, 0, 0,
15739157ec0SLuca Boccassi			PKT_RX_VLAN_PKT | PKT_RX_VLAN_STRIPPED, 0, 0, 0,
15839157ec0SLuca Boccassi			0, 0, 0, 0,
15939157ec0SLuca Boccassi			0, 0, 0, 0};
16039157ec0SLuca Boccassi
16139157ec0SLuca Boccassi	const vector unsigned char rss_flags = (vector unsigned char){
16239157ec0SLuca Boccassi			0, PKT_RX_FDIR, 0, 0,
16339157ec0SLuca Boccassi			0, 0, PKT_RX_RSS_HASH, PKT_RX_RSS_HASH | PKT_RX_FDIR,
16439157ec0SLuca Boccassi			0, 0, 0, 0,
16539157ec0SLuca Boccassi			0, 0, 0, 0};
16639157ec0SLuca Boccassi
16739157ec0SLuca Boccassi	const vector unsigned char l3_l4e_flags = (vector unsigned char){
16839157ec0SLuca Boccassi			0,
16939157ec0SLuca Boccassi			PKT_RX_IP_CKSUM_BAD,
17039157ec0SLuca Boccassi			PKT_RX_L4_CKSUM_BAD,
17139157ec0SLuca Boccassi			PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD,
17239157ec0SLuca Boccassi			PKT_RX_EIP_CKSUM_BAD,
17339157ec0SLuca Boccassi			PKT_RX_EIP_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD,
17439157ec0SLuca Boccassi			PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD,
17539157ec0SLuca Boccassi			PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD
17639157ec0SLuca Boccassi					     | PKT_RX_IP_CKSUM_BAD,
17739157ec0SLuca Boccassi			0, 0, 0, 0, 0, 0, 0, 0};
17839157ec0SLuca Boccassi
17939157ec0SLuca Boccassi	vlan0 = (vector unsigned int)vec_mergel(descs[0], descs[1]);
18039157ec0SLuca Boccassi	vlan1 = (vector unsigned int)vec_mergel(descs[2], descs[3]);
18139157ec0SLuca Boccassi	vlan0 = (vector unsigned int)vec_mergeh(vlan0, vlan1);
18239157ec0SLuca Boccassi
18339157ec0SLuca Boccassi	vlan1 = vec_and(vlan0, rss_vlan_msk);
18439157ec0SLuca Boccassi	vlan0 = (vector unsigned int)vec_perm(vlan_flags,
18539157ec0SLuca Boccassi					(vector unsigned char){},
18639157ec0SLuca Boccassi					*(vector unsigned char *)&vlan1);
18739157ec0SLuca Boccassi
18839157ec0SLuca Boccassi	rss = vec_sr(vlan1, (vector unsigned int){11, 11, 11, 11});
18939157ec0SLuca Boccassi	rss = (vector unsigned int)vec_perm(rss_flags, (vector unsigned char){},
19039157ec0SLuca Boccassi					*(vector unsigned char *)&rss);
19139157ec0SLuca Boccassi
19239157ec0SLuca Boccassi	l3_l4e = vec_sr(vlan1, (vector unsigned int){22, 22, 22, 22});
19339157ec0SLuca Boccassi	l3_l4e = (vector unsigned int)vec_perm(l3_l4e_flags,
19439157ec0SLuca Boccassi					(vector unsigned char){},
19539157ec0SLuca Boccassi					*(vector unsigned char *)&l3_l4e);
19639157ec0SLuca Boccassi
19739157ec0SLuca Boccassi	vlan0 = vec_or(vlan0, rss);
19839157ec0SLuca Boccassi	vlan0 = vec_or(vlan0, l3_l4e);
19939157ec0SLuca Boccassi
20039157ec0SLuca Boccassi	rx_pkts[0]->ol_flags = (uint64_t)vlan0[2];
20139157ec0SLuca Boccassi	rx_pkts[1]->ol_flags = (uint64_t)vlan0[3];
20239157ec0SLuca Boccassi	rx_pkts[2]->ol_flags = (uint64_t)vlan0[0];
20339157ec0SLuca Boccassi	rx_pkts[3]->ol_flags = (uint64_t)vlan0[1];
20439157ec0SLuca Boccassi}
20539157ec0SLuca Boccassi#else
20639157ec0SLuca Boccassi#define desc_to_olflags_v(desc, rx_pkts) do {} while (0)
20739157ec0SLuca Boccassi#endif
20839157ec0SLuca Boccassi
20939157ec0SLuca Boccassi#define PKTLEN_SHIFT     10
21039157ec0SLuca Boccassi
21139157ec0SLuca Boccassistatic inline void
21239157ec0SLuca Boccassidesc_to_ptype_v(vector unsigned long descs[4], struct rte_mbuf **rx_pkts)
21339157ec0SLuca Boccassi{
21439157ec0SLuca Boccassi	vector unsigned long ptype0 = vec_mergel(descs[0], descs[1]);
21539157ec0SLuca Boccassi	vector unsigned long ptype1 = vec_mergel(descs[2], descs[3]);
21639157ec0SLuca Boccassi
21739157ec0SLuca Boccassi	ptype0 = vec_sr(ptype0, (vector unsigned long){30, 30});
21839157ec0SLuca Boccassi	ptype1 = vec_sr(ptype1, (vector unsigned long){30, 30});
21939157ec0SLuca Boccassi
22039157ec0SLuca Boccassi	rx_pkts[0]->packet_type = i40e_rxd_pkt_type_mapping(
22139157ec0SLuca Boccassi					(*(vector unsigned char *)&ptype0)[0]);
22239157ec0SLuca Boccassi	rx_pkts[1]->packet_type = i40e_rxd_pkt_type_mapping(
22339157ec0SLuca Boccassi					(*(vector unsigned char *)&ptype0)[8]);
22439157ec0SLuca Boccassi	rx_pkts[2]->packet_type = i40e_rxd_pkt_type_mapping(
22539157ec0SLuca Boccassi					(*(vector unsigned char *)&ptype1)[0]);
22639157ec0SLuca Boccassi	rx_pkts[3]->packet_type = i40e_rxd_pkt_type_mapping(
22739157ec0SLuca Boccassi					(*(vector unsigned char *)&ptype1)[8]);
22839157ec0SLuca Boccassi}
22939157ec0SLuca Boccassi
23039157ec0SLuca Boccassi /* Notice:
23139157ec0SLuca Boccassi  * - nb_pkts < RTE_I40E_DESCS_PER_LOOP, just return no packet
23239157ec0SLuca Boccassi  * - nb_pkts > RTE_I40E_VPMD_RX_BURST, only scan RTE_I40E_VPMD_RX_BURST
23339157ec0SLuca Boccassi  *   numbers of DD bits
23439157ec0SLuca Boccassi  */
23539157ec0SLuca Boccassistatic inline uint16_t
23639157ec0SLuca Boccassi_recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,
23739157ec0SLuca Boccassi		   uint16_t nb_pkts, uint8_t *split_packet)
23839157ec0SLuca Boccassi{
23939157ec0SLuca Boccassi	volatile union i40e_rx_desc *rxdp;
24039157ec0SLuca Boccassi	struct i40e_rx_entry *sw_ring;
24139157ec0SLuca Boccassi	uint16_t nb_pkts_recd;
24239157ec0SLuca Boccassi	int pos;
24339157ec0SLuca Boccassi	uint64_t var;
24439157ec0SLuca Boccassi	vector unsigned char shuf_msk;
24539157ec0SLuca Boccassi
24639157ec0SLuca Boccassi	vector unsigned short crc_adjust = (vector unsigned short){
24739157ec0SLuca Boccassi		0, 0,         /* ignore pkt_type field */
24839157ec0SLuca Boccassi		rxq->crc_len, /* sub crc on pkt_len */
24939157ec0SLuca Boccassi		0,            /* ignore high-16bits of pkt_len */
25039157ec0SLuca Boccassi		rxq->crc_len, /* sub crc on data_len */
25139157ec0SLuca Boccassi		0, 0, 0       /* ignore non-length fields */
25239157ec0SLuca Boccassi		};
25339157ec0SLuca Boccassi	vector unsigned long dd_check, eop_check;
25439157ec0SLuca Boccassi
25539157ec0SLuca Boccassi	/* nb_pkts shall be less equal than RTE_I40E_MAX_RX_BURST */
25639157ec0SLuca Boccassi	nb_pkts = RTE_MIN(nb_pkts, RTE_I40E_MAX_RX_BURST);
25739157ec0SLuca Boccassi
25839157ec0SLuca Boccassi	/* nb_pkts has to be floor-aligned to RTE_I40E_DESCS_PER_LOOP */
25939157ec0SLuca Boccassi	nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_I40E_DESCS_PER_LOOP);
26039157ec0SLuca Boccassi
26139157ec0SLuca Boccassi	/* Just the act of getting into the function from the application is
26239157ec0SLuca Boccassi	 * going to cost about 7 cycles
26339157ec0SLuca Boccassi	 */
26439157ec0SLuca Boccassi	rxdp = rxq->rx_ring + rxq->rx_tail;
26539157ec0SLuca Boccassi
26639157ec0SLuca Boccassi	rte_prefetch0(rxdp);
26739157ec0SLuca Boccassi
26839157ec0SLuca Boccassi	/* See if we need to rearm the RX queue - gives the prefetch a bit
26939157ec0SLuca Boccassi	 * of time to act
27039157ec0SLuca Boccassi	 */
27139157ec0SLuca Boccassi	if (rxq->rxrearm_nb > RTE_I40E_RXQ_REARM_THRESH)
27239157ec0SLuca Boccassi		i40e_rxq_rearm(rxq);
27339157ec0SLuca Boccassi
27439157ec0SLuca Boccassi	/* Before we start moving massive data around, check to see if
27539157ec0SLuca Boccassi	 * there is actually a packet available
27639157ec0SLuca Boccassi	 */
27739157ec0SLuca Boccassi	if (!(rxdp->wb.qword1.status_error_len &
27839157ec0SLuca Boccassi			rte_cpu_to_le_32(1 << I40E_RX_DESC_STATUS_DD_SHIFT)))
27939157ec0SLuca Boccassi		return 0;
28039157ec0SLuca Boccassi
28139157ec0SLuca Boccassi	/* 4 packets DD mask */
28239157ec0SLuca Boccassi	dd_check = (vector unsigned long){0x0000000100000001ULL,
28339157ec0SLuca Boccassi					  0x0000000100000001ULL};
28439157ec0SLuca Boccassi
28539157ec0SLuca Boccassi	/* 4 packets EOP mask */
28639157ec0SLuca Boccassi	eop_check = (vector unsigned long){0x0000000200000002ULL,
28739157ec0SLuca Boccassi					   0x0000000200000002ULL};
28839157ec0SLuca Boccassi
28939157ec0SLuca Boccassi	/* mask to shuffle from desc. to mbuf */
29039157ec0SLuca Boccassi	shuf_msk = (vector unsigned char){
29139157ec0SLuca Boccassi		0xFF, 0xFF,   /* pkt_type set as unknown */
29239157ec0SLuca Boccassi		0xFF, 0xFF,   /* pkt_type set as unknown */
29339157ec0SLuca Boccassi		14, 15,       /* octet 15~14, low 16 bits pkt_len */
29439157ec0SLuca Boccassi		0xFF, 0xFF,   /* skip high 16 bits pkt_len, zero out */
29539157ec0SLuca Boccassi		14, 15,       /* octet 15~14, 16 bits data_len */
29639157ec0SLuca Boccassi		2, 3,         /* octet 2~3, low 16 bits vlan_macip */
29739157ec0SLuca Boccassi		4, 5, 6, 7    /* octet 4~7, 32bits rss */
29839157ec0SLuca Boccassi		};
29939157ec0SLuca Boccassi
30039157ec0SLuca Boccassi	/* Cache is empty -> need to scan the buffer rings, but first move
30139157ec0SLuca Boccassi	 * the next 'n' mbufs into the cache
30239157ec0SLuca Boccassi	 */
30339157ec0SLuca Boccassi	sw_ring = &rxq->sw_ring[rxq->rx_tail];
30439157ec0SLuca Boccassi
30539157ec0SLuca Boccassi	/* A. load 4 packet in one loop
30639157ec0SLuca Boccassi	 * [A*. mask out 4 unused dirty field in desc]
30739157ec0SLuca Boccassi	 * B. copy 4 mbuf point from swring to rx_pkts
30839157ec0SLuca Boccassi	 * C. calc the number of DD bits among the 4 packets
30939157ec0SLuca Boccassi	 * [C*. extract the end-of-packet bit, if requested]
31039157ec0SLuca Boccassi	 * D. fill info. from desc to mbuf
31139157ec0SLuca Boccassi	 */
31239157ec0SLuca Boccassi
31339157ec0SLuca Boccassi	for (pos = 0, nb_pkts_recd = 0; pos < nb_pkts;
31439157ec0SLuca Boccassi			pos += RTE_I40E_DESCS_PER_LOOP,
31539157ec0SLuca Boccassi			rxdp += RTE_I40E_DESCS_PER_LOOP) {
31639157ec0SLuca Boccassi		vector unsigned long descs[RTE_I40E_DESCS_PER_LOOP];
31739157ec0SLuca Boccassi		vector unsigned char pkt_mb1, pkt_mb2, pkt_mb3, pkt_mb4;
31839157ec0SLuca Boccassi		vector unsigned short staterr, sterr_tmp1, sterr_tmp2;
31939157ec0SLuca Boccassi		vector unsigned long mbp1, mbp2; /* two mbuf pointer
32039157ec0SLuca Boccassi						  * in one XMM reg.
32139157ec0SLuca Boccassi						  */
32239157ec0SLuca Boccassi
32339157ec0SLuca Boccassi		/* B.1 load 1 mbuf point */
32439157ec0SLuca Boccassi		mbp1 = *(vector unsigned long *)&sw_ring[pos];
32539157ec0SLuca Boccassi		/* Read desc statuses backwards to avoid race condition */
32639157ec0SLuca Boccassi		/* A.1 load 4 pkts desc */
32739157ec0SLuca Boccassi		descs[3] = *(vector unsigned long *)(rxdp + 3);
32839157ec0SLuca Boccassi		rte_compiler_barrier();
32939157ec0SLuca Boccassi
33039157ec0SLuca Boccassi		/* B.2 copy 2 mbuf point into rx_pkts  */
33139157ec0SLuca Boccassi		*(vector unsigned long *)&rx_pkts[pos] = mbp1;
33239157ec0SLuca Boccassi
33339157ec0SLuca Boccassi		/* B.1 load 1 mbuf point */
33439157ec0SLuca Boccassi		mbp2 = *(vector unsigned long *)&sw_ring[pos + 2];
33539157ec0SLuca Boccassi
33639157ec0SLuca Boccassi		descs[2] = *(vector unsigned long *)(rxdp + 2);
33739157ec0SLuca Boccassi		rte_compiler_barrier();
33839157ec0SLuca Boccassi		/* B.1 load 2 mbuf point */
33939157ec0SLuca Boccassi		descs[1] = *(vector unsigned long *)(rxdp + 1);
34039157ec0SLuca Boccassi		rte_compiler_barrier();
34139157ec0SLuca Boccassi		descs[0] = *(vector unsigned long *)(rxdp);
34239157ec0SLuca Boccassi
34339157ec0SLuca Boccassi		/* B.2 copy 2 mbuf point into rx_pkts  */
34439157ec0SLuca Boccassi		*(vector unsigned long *)&rx_pkts[pos + 2] =  mbp2;
34539157ec0SLuca Boccassi
34639157ec0SLuca Boccassi		if (split_packet) {
34739157ec0SLuca Boccassi			rte_mbuf_prefetch_part2(rx_pkts[pos]);
34839157ec0SLuca Boccassi			rte_mbuf_prefetch_part2(rx_pkts[pos + 1]);
34939157ec0SLuca Boccassi			rte_mbuf_prefetch_part2(rx_pkts[pos + 2]);
35039157ec0SLuca Boccassi			rte_mbuf_prefetch_part2(rx_pkts[pos + 3]);
35139157ec0SLuca Boccassi		}
35239157ec0SLuca Boccassi
35339157ec0SLuca Boccassi		/* avoid compiler reorder optimization */
35439157ec0SLuca Boccassi		rte_compiler_barrier();
35539157ec0SLuca Boccassi
35639157ec0SLuca Boccassi		/* pkt 3,4 shift the pktlen field to be 16-bit aligned*/
35739157ec0SLuca Boccassi		const vector unsigned int len3 = vec_sl(
35839157ec0SLuca Boccassi			vec_ld(0, (vector unsigned int *)&descs[3]),
35939157ec0SLuca Boccassi			(vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
36039157ec0SLuca Boccassi
36139157ec0SLuca Boccassi		const vector unsigned int len2 = vec_sl(
36239157ec0SLuca Boccassi			vec_ld(0, (vector unsigned int *)&descs[2]),
36339157ec0SLuca Boccassi			(vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
36439157ec0SLuca Boccassi
36539157ec0SLuca Boccassi		/* merge the now-aligned packet length fields back in */
36639157ec0SLuca Boccassi		descs[3] = (vector unsigned long)len3;
36739157ec0SLuca Boccassi		descs[2] = (vector unsigned long)len2;
36839157ec0SLuca Boccassi
36939157ec0SLuca Boccassi		/* D.1 pkt 3,4 convert format from desc to pktmbuf */
37039157ec0SLuca Boccassi		pkt_mb4 = vec_perm((vector unsigned char)descs[3],
37139157ec0SLuca Boccassi				  (vector unsigned char){}, shuf_msk);
37239157ec0SLuca Boccassi		pkt_mb3 = vec_perm((vector unsigned char)descs[2],
37339157ec0SLuca Boccassi				  (vector unsigned char){}, shuf_msk);
37439157ec0SLuca Boccassi
37539157ec0SLuca Boccassi		/* C.1 4=>2 filter staterr info only */
37639157ec0SLuca Boccassi		sterr_tmp2 = vec_mergel((vector unsigned short)descs[3],
37739157ec0SLuca Boccassi					(vector unsigned short)descs[2]);
37839157ec0SLuca Boccassi		/* C.1 4=>2 filter staterr info only */
37939157ec0SLuca Boccassi		sterr_tmp1 = vec_mergel((vector unsigned short)descs[1],
38039157ec0SLuca Boccassi					(vector unsigned short)descs[0]);
38139157ec0SLuca Boccassi		/* D.2 pkt 3,4 set in_port/nb_seg and remove crc */
38239157ec0SLuca Boccassi		pkt_mb4 = (vector unsigned char)vec_sub(
38339157ec0SLuca Boccassi				(vector unsigned short)pkt_mb4, crc_adjust);
38439157ec0SLuca Boccassi		pkt_mb3 = (vector unsigned char)vec_sub(
38539157ec0SLuca Boccassi				(vector unsigned short)pkt_mb3, crc_adjust);
38639157ec0SLuca Boccassi
38739157ec0SLuca Boccassi		/* pkt 1,2 shift the pktlen field to be 16-bit aligned*/
38839157ec0SLuca Boccassi		const vector unsigned int len1 = vec_sl(
38939157ec0SLuca Boccassi			vec_ld(0, (vector unsigned int *)&descs[1]),
39039157ec0SLuca Boccassi			(vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
39139157ec0SLuca Boccassi		const vector unsigned int len0 = vec_sl(
39239157ec0SLuca Boccassi			vec_ld(0, (vector unsigned int *)&descs[0]),
39339157ec0SLuca Boccassi			(vector unsigned int){0, 0, 0, PKTLEN_SHIFT});
39439157ec0SLuca Boccassi
39539157ec0SLuca Boccassi		/* merge the now-aligned packet length fields back in */
39639157ec0SLuca Boccassi		descs[1] = (vector unsigned long)len1;
39739157ec0SLuca Boccassi		descs[0] = (vector unsigned long)len0;
39839157ec0SLuca Boccassi
39939157ec0SLuca Boccassi		/* D.1 pkt 1,2 convert format from desc to pktmbuf */
40039157ec0SLuca Boccassi		pkt_mb2 = vec_perm((vector unsigned char)descs[1],
40139157ec0SLuca Boccassi				   (vector unsigned char){}, shuf_msk);
40239157ec0SLuca Boccassi		pkt_mb1 = vec_perm((vector unsigned char)descs[0],
40339157ec0SLuca Boccassi				   (vector unsigned char){}, shuf_msk);
40439157ec0SLuca Boccassi
40539157ec0SLuca Boccassi		/* C.2 get 4 pkts staterr value  */
40639157ec0SLuca Boccassi		staterr = (vector unsigned short)vec_mergeh(
40739157ec0SLuca Boccassi				sterr_tmp1, sterr_tmp2);
40839157ec0SLuca Boccassi
40939157ec0SLuca Boccassi		/* D.3 copy final 3,4 data to rx_pkts */
41039157ec0SLuca Boccassi		vec_st(pkt_mb4, 0,
41139157ec0SLuca Boccassi		 (vector unsigned char *)&rx_pkts[pos + 3]
41239157ec0SLuca Boccassi			->rx_descriptor_fields1
41339157ec0SLuca Boccassi		);
41439157ec0SLuca Boccassi		vec_st(pkt_mb3, 0,
41539157ec0SLuca Boccassi		 (vector unsigned char *)&rx_pkts[pos + 2]
41639157ec0SLuca Boccassi			->rx_descriptor_fields1
41739157ec0SLuca Boccassi		);
41839157ec0SLuca Boccassi
41939157ec0SLuca Boccassi		/* D.2 pkt 1,2 set in_port/nb_seg and remove crc */
42039157ec0SLuca Boccassi		pkt_mb2 = (vector unsigned char)vec_sub(
42139157ec0SLuca Boccassi				(vector unsigned short)pkt_mb2, crc_adjust);
42239157ec0SLuca Boccassi		pkt_mb1 = (vector unsigned char)vec_sub(
42339157ec0SLuca Boccassi				(vector unsigned short)pkt_mb1,	crc_adjust);
42439157ec0SLuca Boccassi
42539157ec0SLuca Boccassi		/* C* extract and record EOP bit */
42639157ec0SLuca Boccassi		if (split_packet) {
42739157ec0SLuca Boccassi			vector unsigned char eop_shuf_mask =
42839157ec0SLuca Boccassi				(vector unsigned char){
42939157ec0SLuca Boccassi					0xFF, 0xFF, 0xFF, 0xFF,
43039157ec0SLuca Boccassi					0xFF, 0xFF, 0xFF, 0xFF,
43139157ec0SLuca Boccassi					0xFF, 0xFF, 0xFF, 0xFF,
43239157ec0SLuca Boccassi					0x04, 0x0C, 0x00, 0x08
43339157ec0SLuca Boccassi				};
43439157ec0SLuca Boccassi
43539157ec0SLuca Boccassi			/* and with mask to extract bits, flipping 1-0 */
43639157ec0SLuca Boccassi			vector unsigned char eop_bits = vec_and(
43739157ec0SLuca Boccassi				(vector unsigned char)vec_nor(staterr, staterr),
43839157ec0SLuca Boccassi				(vector unsigned char)eop_check);
43939157ec0SLuca Boccassi			/* the staterr values are not in order, as the count
44039157ec0SLuca Boccassi			 * count of dd bits doesn't care. However, for end of
44139157ec0SLuca Boccassi			 * packet tracking, we do care, so shuffle. This also
44239157ec0SLuca Boccassi			 * compresses the 32-bit values to 8-bit
44339157ec0SLuca Boccassi			 */
44439157ec0SLuca Boccassi			eop_bits = vec_perm(eop_bits, (vector unsigned char){},
44539157ec0SLuca Boccassi					    eop_shuf_mask);
44639157ec0SLuca Boccassi			/* store the resulting 32-bit value */
44739157ec0SLuca Boccassi			*split_packet = (vec_ld(0,
44839157ec0SLuca Boccassi					 (vector unsigned int *)&eop_bits))[0];
44939157ec0SLuca Boccassi			split_packet += RTE_I40E_DESCS_PER_LOOP;
45039157ec0SLuca Boccassi
45139157ec0SLuca Boccassi			/* zero-out next pointers */
45239157ec0SLuca Boccassi			rx_pkts[pos]->next = NULL;
45339157ec0SLuca Boccassi			rx_pkts[pos + 1]->next = NULL;
45439157ec0SLuca Boccassi			rx_pkts[pos + 2]->next = NULL;
45539157ec0SLuca Boccassi			rx_pkts[pos + 3]->next = NULL;
45639157ec0SLuca Boccassi		}
45739157ec0SLuca Boccassi
45839157ec0SLuca Boccassi		/* C.3 calc available number of desc */
45939157ec0SLuca Boccassi		staterr = vec_and(staterr, (vector unsigned short)dd_check);
46039157ec0SLuca Boccassi
46139157ec0SLuca Boccassi		/* D.3 copy final 1,2 data to rx_pkts */
46239157ec0SLuca Boccassi		vec_st(pkt_mb2, 0,
46339157ec0SLuca Boccassi		 (vector unsigned char *)&rx_pkts[pos + 1]
46439157ec0SLuca Boccassi			->rx_descriptor_fields1
46539157ec0SLuca Boccassi		);
46639157ec0SLuca Boccassi		vec_st(pkt_mb1, 0,
46739157ec0SLuca Boccassi		 (vector unsigned char *)&rx_pkts[pos]->rx_descriptor_fields1
46839157ec0SLuca Boccassi		);
46939157ec0SLuca Boccassi		desc_to_ptype_v(descs, &rx_pkts[pos]);
47039157ec0SLuca Boccassi		desc_to_olflags_v(descs, &rx_pkts[pos]);
47139157ec0SLuca Boccassi
47239157ec0SLuca Boccassi		/* C.4 calc avaialbe number of desc */
47339157ec0SLuca Boccassi		var = __builtin_popcountll((vec_ld(0,
47439157ec0SLuca Boccassi			(vector unsigned long *)&staterr)[0]));
47539157ec0SLuca Boccassi		nb_pkts_recd += var;
47639157ec0SLuca Boccassi		if (likely(var != RTE_I40E_DESCS_PER_LOOP))
47739157ec0SLuca Boccassi			break;
47839157ec0SLuca Boccassi	}
47939157ec0SLuca Boccassi
48039157ec0SLuca Boccassi	/* Update our internal tail pointer */
48139157ec0SLuca Boccassi	rxq->rx_tail = (uint16_t)(rxq->rx_tail + nb_pkts_recd);
48239157ec0SLuca Boccassi	rxq->rx_tail = (uint16_t)(rxq->rx_tail & (rxq->nb_rx_desc - 1));
48339157ec0SLuca Boccassi	rxq->rxrearm_nb = (uint16_t)(rxq->rxrearm_nb + nb_pkts_recd);
48439157ec0SLuca Boccassi
48539157ec0SLuca Boccassi	return nb_pkts_recd;
48639157ec0SLuca Boccassi}
48739157ec0SLuca Boccassi
48839157ec0SLuca Boccassi /* Notice:
48939157ec0SLuca Boccassi  * - nb_pkts < RTE_I40E_DESCS_PER_LOOP, just return no packet
49039157ec0SLuca Boccassi  * - nb_pkts > RTE_I40E_VPMD_RX_BURST, only scan RTE_I40E_VPMD_RX_BURST
49139157ec0SLuca Boccassi  *   numbers of DD bits
49239157ec0SLuca Boccassi  */
49339157ec0SLuca Boccassiuint16_t
49439157ec0SLuca Boccassii40e_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
49539157ec0SLuca Boccassi		   uint16_t nb_pkts)
49639157ec0SLuca Boccassi{
49739157ec0SLuca Boccassi	return _recv_raw_pkts_vec(rx_queue, rx_pkts, nb_pkts, NULL);
49839157ec0SLuca Boccassi}
49939157ec0SLuca Boccassi
50039157ec0SLuca Boccassi /* vPMD receive routine that reassembles scattered packets
50139157ec0SLuca Boccassi  * Notice:
50239157ec0SLuca Boccassi  * - nb_pkts < RTE_I40E_DESCS_PER_LOOP, just return no packet
50339157ec0SLuca Boccassi  * - nb_pkts > RTE_I40E_VPMD_RX_BURST, only scan RTE_I40E_VPMD_RX_BURST
50439157ec0SLuca Boccassi  *   numbers of DD bits
50539157ec0SLuca Boccassi  */
50639157ec0SLuca Boccassiuint16_t
50739157ec0SLuca Boccassii40e_recv_scattered_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
50839157ec0SLuca Boccassi			     uint16_t nb_pkts)
50939157ec0SLuca Boccassi{
51039157ec0SLuca Boccassi	struct i40e_rx_queue *rxq = rx_queue;
51139157ec0SLuca Boccassi	uint8_t split_flags[RTE_I40E_VPMD_RX_BURST] = {0};
51239157ec0SLuca Boccassi
51339157ec0SLuca Boccassi	/* get some new buffers */
51439157ec0SLuca Boccassi	uint16_t nb_bufs = _recv_raw_pkts_vec(rxq, rx_pkts, nb_pkts,
51539157ec0SLuca Boccassi			split_flags);
51639157ec0SLuca Boccassi	if (nb_bufs == 0)
51739157ec0SLuca Boccassi		return 0;
51839157ec0SLuca Boccassi
51939157ec0SLuca Boccassi	/* happy day case, full burst + no packets to be joined */
52039157ec0SLuca Boccassi	const uint64_t *split_fl64 = (uint64_t *)split_flags;
52139157ec0SLuca Boccassi
52239157ec0SLuca Boccassi	if (rxq->pkt_first_seg == NULL &&
52339157ec0SLuca Boccassi	    split_fl64[0] == 0 && split_fl64[1] == 0 &&
52439157ec0SLuca Boccassi	    split_fl64[2] == 0 && split_fl64[3] == 0)
52539157ec0SLuca Boccassi		return nb_bufs;
52639157ec0SLuca Boccassi
52739157ec0SLuca Boccassi	/* reassemble any packets that need reassembly*/
52839157ec0SLuca Boccassi	unsigned int i = 0;
52939157ec0SLuca Boccassi
53039157ec0SLuca Boccassi	if (!rxq->pkt_first_seg) {
53139157ec0SLuca Boccassi		/* find the first split flag, and only reassemble then*/
53239157ec0SLuca Boccassi		while (i < nb_bufs && !split_flags[i])
53339157ec0SLuca Boccassi			i++;
53439157ec0SLuca Boccassi		if (i == nb_bufs)
53539157ec0SLuca Boccassi			return nb_bufs;
53639157ec0SLuca Boccassi	}
53739157ec0SLuca Boccassi	return i + reassemble_packets(rxq, &rx_pkts[i], nb_bufs - i,
53839157ec0SLuca Boccassi		&split_flags[i]);
53939157ec0SLuca Boccassi}
54039157ec0SLuca Boccassi
54139157ec0SLuca Boccassistatic inline void
54239157ec0SLuca Boccassivtx1(volatile struct i40e_tx_desc *txdp,
54339157ec0SLuca Boccassi	struct rte_mbuf *pkt, uint64_t flags)
54439157ec0SLuca Boccassi{
54539157ec0SLuca Boccassi	uint64_t high_qw = (I40E_TX_DESC_DTYPE_DATA |
54639157ec0SLuca Boccassi		((uint64_t)flags  << I40E_TXD_QW1_CMD_SHIFT) |
54739157ec0SLuca Boccassi		((uint64_t)pkt->data_len << I40E_TXD_QW1_TX_BUF_SZ_SHIFT));
54839157ec0SLuca Boccassi
54939157ec0SLuca Boccassi	vector unsigned long descriptor = (vector unsigned long){
55039157ec0SLuca Boccassi		pkt->buf_physaddr + pkt->data_off, high_qw};
55139157ec0SLuca Boccassi	*(vector unsigned long *)txdp = descriptor;
55239157ec0SLuca Boccassi}
55339157ec0SLuca Boccassi
55439157ec0SLuca Boccassistatic inline void
55539157ec0SLuca Boccassivtx(volatile struct i40e_tx_desc *txdp,
55639157ec0SLuca Boccassi	struct rte_mbuf **pkt, uint16_t nb_pkts,  uint64_t flags)
55739157ec0SLuca Boccassi{
55839157ec0SLuca Boccassi	int i;
55939157ec0SLuca Boccassi
56039157ec0SLuca Boccassi	for (i = 0; i < nb_pkts; ++i, ++txdp, ++pkt)
56139157ec0SLuca Boccassi		vtx1(txdp, *pkt, flags);
56239157ec0SLuca Boccassi}
56339157ec0SLuca Boccassi
56439157ec0SLuca Boccassiuint16_t
56539157ec0SLuca Boccassii40e_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
56639157ec0SLuca Boccassi		   uint16_t nb_pkts)
56739157ec0SLuca Boccassi{
56839157ec0SLuca Boccassi	struct i40e_tx_queue *txq = (struct i40e_tx_queue *)tx_queue;
56939157ec0SLuca Boccassi	volatile struct i40e_tx_desc *txdp;
57039157ec0SLuca Boccassi	struct i40e_tx_entry *txep;
57139157ec0SLuca Boccassi	uint16_t n, nb_commit, tx_id;
57239157ec0SLuca Boccassi	uint64_t flags = I40E_TD_CMD;
57339157ec0SLuca Boccassi	uint64_t rs = I40E_TX_DESC_CMD_RS | I40E_TD_CMD;
57439157ec0SLuca Boccassi	int i;
57539157ec0SLuca Boccassi
57639157ec0SLuca Boccassi	/* cross rx_thresh boundary is not allowed */
57739157ec0SLuca Boccassi	nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh);
57839157ec0SLuca Boccassi
57939157ec0SLuca Boccassi	if (txq->nb_tx_free < txq->tx_free_thresh)
58039157ec0SLuca Boccassi		i40e_tx_free_bufs(txq);
58139157ec0SLuca Boccassi
58239157ec0SLuca Boccassi	nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts);
58339157ec0SLuca Boccassi	nb_commit = nb_pkts;
58439157ec0SLuca Boccassi	if (unlikely(nb_pkts == 0))
58539157ec0SLuca Boccassi		return 0;
58639157ec0SLuca Boccassi
58739157ec0SLuca Boccassi	tx_id = txq->tx_tail;
58839157ec0SLuca Boccassi	txdp = &txq->tx_ring[tx_id];
58939157ec0SLuca Boccassi	txep = &txq->sw_ring[tx_id];
59039157ec0SLuca Boccassi
59139157ec0SLuca Boccassi	txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts);
59239157ec0SLuca Boccassi
59339157ec0SLuca Boccassi	n = (uint16_t)(txq->nb_tx_desc - tx_id);
59439157ec0SLuca Boccassi	if (nb_commit >= n) {
59539157ec0SLuca Boccassi		tx_backlog_entry(txep, tx_pkts, n);
59639157ec0SLuca Boccassi
59739157ec0SLuca Boccassi		for (i = 0; i < n - 1; ++i, ++tx_pkts, ++txdp)
59839157ec0SLuca Boccassi			vtx1(txdp, *tx_pkts, flags);
59939157ec0SLuca Boccassi
60039157ec0SLuca Boccassi		vtx1(txdp, *tx_pkts++, rs);
60139157ec0SLuca Boccassi
60239157ec0SLuca Boccassi		nb_commit = (uint16_t)(nb_commit - n);
60339157ec0SLuca Boccassi
60439157ec0SLuca Boccassi		tx_id = 0;
60539157ec0SLuca Boccassi		txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1);
60639157ec0SLuca Boccassi
60739157ec0SLuca Boccassi		/* avoid reach the end of ring */
60839157ec0SLuca Boccassi		txdp = &txq->tx_ring[tx_id];
60939157ec0SLuca Boccassi		txep = &txq->sw_ring[tx_id];
61039157ec0SLuca Boccassi	}
61139157ec0SLuca Boccassi
61239157ec0SLuca Boccassi	tx_backlog_entry(txep, tx_pkts, nb_commit);
61339157ec0SLuca Boccassi
61439157ec0SLuca Boccassi	vtx(txdp, tx_pkts, nb_commit, flags);
61539157ec0SLuca Boccassi
61639157ec0SLuca Boccassi	tx_id = (uint16_t)(tx_id + nb_commit);
61739157ec0SLuca Boccassi	if (tx_id > txq->tx_next_rs) {
61839157ec0SLuca Boccassi		txq->tx_ring[txq->tx_next_rs].cmd_type_offset_bsz |=
61939157ec0SLuca Boccassi			rte_cpu_to_le_64(((uint64_t)I40E_TX_DESC_CMD_RS) <<
62039157ec0SLuca Boccassi						I40E_TXD_QW1_CMD_SHIFT);
62139157ec0SLuca Boccassi		txq->tx_next_rs =
62239157ec0SLuca Boccassi			(uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh);
62339157ec0SLuca Boccassi	}
62439157ec0SLuca Boccassi
62539157ec0SLuca Boccassi	txq->tx_tail = tx_id;
62639157ec0SLuca Boccassi
62739157ec0SLuca Boccassi	I40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);
62839157ec0SLuca Boccassi
62939157ec0SLuca Boccassi	return nb_pkts;
63039157ec0SLuca Boccassi}
63139157ec0SLuca Boccassi
63239157ec0SLuca Boccassivoid __attribute__((cold))
63339157ec0SLuca Boccassii40e_rx_queue_release_mbufs_vec(struct i40e_rx_queue *rxq)
63439157ec0SLuca Boccassi{
63539157ec0SLuca Boccassi	_i40e_rx_queue_release_mbufs_vec(rxq);
63639157ec0SLuca Boccassi}
63739157ec0SLuca Boccassi
63839157ec0SLuca Boccassiint __attribute__((cold))
63939157ec0SLuca Boccassii40e_rxq_vec_setup(struct i40e_rx_queue *rxq)
64039157ec0SLuca Boccassi{
64139157ec0SLuca Boccassi	return i40e_rxq_vec_setup_default(rxq);
64239157ec0SLuca Boccassi}
64339157ec0SLuca Boccassi
64439157ec0SLuca Boccassiint __attribute__((cold))
64539157ec0SLuca Boccassii40e_txq_vec_setup(struct i40e_tx_queue __rte_unused * txq)
64639157ec0SLuca Boccassi{
64739157ec0SLuca Boccassi	return 0;
64839157ec0SLuca Boccassi}
64939157ec0SLuca Boccassi
65039157ec0SLuca Boccassiint __attribute__((cold))
65139157ec0SLuca Boccassii40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev)
65239157ec0SLuca Boccassi{
65339157ec0SLuca Boccassi	return i40e_rx_vec_dev_conf_condition_check_default(dev);
65439157ec0SLuca Boccassi}