197f17497SC.J. Collier/*-
297f17497SC.J. Collier *   BSD LICENSE
397f17497SC.J. Collier *
497f17497SC.J. Collier *   Copyright 2015 6WIND S.A.
597f17497SC.J. Collier *   Copyright 2015 Mellanox.
697f17497SC.J. Collier *
797f17497SC.J. Collier *   Redistribution and use in source and binary forms, with or without
897f17497SC.J. Collier *   modification, are permitted provided that the following conditions
997f17497SC.J. Collier *   are met:
1097f17497SC.J. Collier *
1197f17497SC.J. Collier *     * Redistributions of source code must retain the above copyright
1297f17497SC.J. Collier *       notice, this list of conditions and the following disclaimer.
1397f17497SC.J. Collier *     * Redistributions in binary form must reproduce the above copyright
1497f17497SC.J. Collier *       notice, this list of conditions and the following disclaimer in
1597f17497SC.J. Collier *       the documentation and/or other materials provided with the
1697f17497SC.J. Collier *       distribution.
1797f17497SC.J. Collier *     * Neither the name of 6WIND S.A. nor the names of its
1897f17497SC.J. Collier *       contributors may be used to endorse or promote products derived
1997f17497SC.J. Collier *       from this software without specific prior written permission.
2097f17497SC.J. Collier *
3297f17497SC.J. Collier */
3397f17497SC.J. Collier
3497f17497SC.J. Collier#include <stddef.h>
3597f17497SC.J. Collier#include <unistd.h>
3697f17497SC.J. Collier#include <string.h>
3797f17497SC.J. Collier#include <assert.h>
3897f17497SC.J. Collier#include <stdint.h>
3997f17497SC.J. Collier#include <stdlib.h>
408b25d1adSChristian Ehrhardt#include <errno.h>
4197f17497SC.J. Collier#include <net/if.h>
4297f17497SC.J. Collier
4397f17497SC.J. Collier/* Verbs header. */
4497f17497SC.J. Collier/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
4597f17497SC.J. Collier#ifdef PEDANTIC
4632e04ea0SChristian Ehrhardt#pragma GCC diagnostic ignored "-Wpedantic"
4797f17497SC.J. Collier#endif
4897f17497SC.J. Collier#include <infiniband/verbs.h>
4997f17497SC.J. Collier#ifdef PEDANTIC
5032e04ea0SChristian Ehrhardt#pragma GCC diagnostic error "-Wpedantic"
5197f17497SC.J. Collier#endif
5297f17497SC.J. Collier
5397f17497SC.J. Collier/* DPDK headers don't like -pedantic. */
5497f17497SC.J. Collier#ifdef PEDANTIC
5532e04ea0SChristian Ehrhardt#pragma GCC diagnostic ignored "-Wpedantic"
5697f17497SC.J. Collier#endif
5797f17497SC.J. Collier#include <rte_malloc.h>
5897f17497SC.J. Collier#include <rte_ethdev.h>
5997f17497SC.J. Collier#include <rte_pci.h>
6097f17497SC.J. Collier#include <rte_common.h>
618b25d1adSChristian Ehrhardt#include <rte_kvargs.h>
6297f17497SC.J. Collier#ifdef PEDANTIC
6332e04ea0SChristian Ehrhardt#pragma GCC diagnostic error "-Wpedantic"
6497f17497SC.J. Collier#endif
6597f17497SC.J. Collier
6697f17497SC.J. Collier#include "mlx5.h"
6797f17497SC.J. Collier#include "mlx5_utils.h"
6897f17497SC.J. Collier#include "mlx5_rxtx.h"
6997f17497SC.J. Collier#include "mlx5_autoconf.h"
7097f17497SC.J. Collier#include "mlx5_defs.h"
7197f17497SC.J. Collier
728b25d1adSChristian Ehrhardt/* Device parameter to enable RX completion queue compression. */
738b25d1adSChristian Ehrhardt#define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
748b25d1adSChristian Ehrhardt
758b25d1adSChristian Ehrhardt/* Device parameter to configure inline send. */
768b25d1adSChristian Ehrhardt#define MLX5_TXQ_INLINE "txq_inline"
778b25d1adSChristian Ehrhardt
788b25d1adSChristian Ehrhardt/*
798b25d1adSChristian Ehrhardt * Device parameter to configure the number of TX queues threshold for
808b25d1adSChristian Ehrhardt * enabling inline send.
818b25d1adSChristian Ehrhardt */
828b25d1adSChristian Ehrhardt#define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
838b25d1adSChristian Ehrhardt
848b25d1adSChristian Ehrhardt/* Device parameter to enable multi-packet send WQEs. */
858b25d1adSChristian Ehrhardt#define MLX5_TXQ_MPW_EN "txq_mpw_en"
868b25d1adSChristian Ehrhardt
8797f17497SC.J. Collier/**
8897f17497SC.J. Collier * Retrieve integer value from environment variable.
8997f17497SC.J. Collier *
9097f17497SC.J. Collier * @param[in] name
9197f17497SC.J. Collier *   Environment variable name.
9297f17497SC.J. Collier *
9397f17497SC.J. Collier * @return
9497f17497SC.J. Collier *   Integer value, 0 if the variable is not set.
9597f17497SC.J. Collier */
9697f17497SC.J. Collierint
9797f17497SC.J. Colliermlx5_getenv_int(const char *name)
9897f17497SC.J. Collier{
9997f17497SC.J. Collier	const char *val = getenv(name);
10097f17497SC.J. Collier
10197f17497SC.J. Collier	if (val == NULL)
10297f17497SC.J. Collier		return 0;
10397f17497SC.J. Collier	return atoi(val);
10497f17497SC.J. Collier}
10597f17497SC.J. Collier
10697f17497SC.J. Collier/**
10797f17497SC.J. Collier * DPDK callback to close the device.
10897f17497SC.J. Collier *
10997f17497SC.J. Collier * Destroy all queues and objects, free memory.
11097f17497SC.J. Collier *
11197f17497SC.J. Collier * @param dev
11297f17497SC.J. Collier *   Pointer to Ethernet device structure.
11397f17497SC.J. Collier */
11497f17497SC.J. Collierstatic void
11597f17497SC.J. Colliermlx5_dev_close(struct rte_eth_dev *dev)
11697f17497SC.J. Collier{
11797f17497SC.J. Collier	struct priv *priv = mlx5_get_priv(dev);
11897f17497SC.J. Collier	unsigned int i;
11997f17497SC.J. Collier
12097f17497SC.J. Collier	priv_lock(priv);
12197f17497SC.J. Collier	DEBUG("%p: closing device \"%s\"",
12297f17497SC.J. Collier	      (void *)dev,
12397f17497SC.J. Collier	      ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
12497f17497SC.J. Collier	/* In case mlx5_dev_stop() has not been called. */
12597f17497SC.J. Collier	priv_dev_interrupt_handler_uninstall(priv, dev);
12697f17497SC.J. Collier	priv_special_flow_disable_all(priv);
12797f17497SC.J. Collier	priv_mac_addrs_disable(priv);
12897f17497SC.J. Collier	priv_destroy_hash_rxqs(priv);
12997f17497SC.J. Collier
13097f17497SC.J. Collier	/* Remove flow director elements. */
13197f17497SC.J. Collier	priv_fdir_disable(priv);
13297f17497SC.J. Collier	priv_fdir_delete_filters_list(priv);
13397f17497SC.J. Collier
13497f17497SC.J. Collier	/* Prevent crashes when queues are still in use. */
13597f17497SC.J. Collier	dev->rx_pkt_burst = removed_rx_burst;
13697f17497SC.J. Collier	dev->tx_pkt_burst = removed_tx_burst;
13797f17497SC.J. Collier	if (priv->rxqs != NULL) {
13897f17497SC.J. Collier		/* XXX race condition if mlx5_rx_burst() is still running. */
13997f17497SC.J. Collier		usleep(1000);
14097f17497SC.J. Collier		for (i = 0; (i != priv->rxqs_n); ++i) {
1418b25d1adSChristian Ehrhardt			struct rxq *rxq = (*priv->rxqs)[i];
1428b25d1adSChristian Ehrhardt			struct rxq_ctrl *rxq_ctrl;
1438b25d1adSChristian Ehrhardt
1448b25d1adSChristian Ehrhardt			if (rxq == NULL)
14597f17497SC.J. Collier				continue;
1468b25d1adSChristian Ehrhardt			rxq_ctrl = container_of(rxq, struct rxq_ctrl, rxq);
14797f17497SC.J. Collier			(*priv->rxqs)[i] = NULL;
1488b25d1adSChristian Ehrhardt			rxq_cleanup(rxq_ctrl);
1498b25d1adSChristian Ehrhardt			rte_free(rxq_ctrl);
15097f17497SC.J. Collier		}
15197f17497SC.J. Collier		priv->rxqs_n = 0;
15297f17497SC.J. Collier		priv->rxqs = NULL;
15397f17497SC.J. Collier	}
15497f17497SC.J. Collier	if (priv->txqs != NULL) {
15597f17497SC.J. Collier		/* XXX race condition if mlx5_tx_burst() is still running. */
15697f17497SC.J. Collier		usleep(1000);
15797f17497SC.J. Collier		for (i = 0; (i != priv->txqs_n); ++i) {
1588b25d1adSChristian Ehrhardt			struct txq *txq = (*priv->txqs)[i];
1598b25d1adSChristian Ehrhardt			struct txq_ctrl *txq_ctrl;
1608b25d1adSChristian Ehrhardt
1618b25d1adSChristian Ehrhardt			if (txq == NULL)
16297f17497SC.J. Collier				continue;
1638b25d1adSChristian Ehrhardt			txq_ctrl = container_of(txq, struct txq_ctrl, txq);
16497f17497SC.J. Collier			(*priv->txqs)[i] = NULL;
1658b25d1adSChristian Ehrhardt			txq_cleanup(txq_ctrl);
1668b25d1adSChristian Ehrhardt			rte_free(txq_ctrl);
16797f17497SC.J. Collier		}
16897f17497SC.J. Collier		priv->txqs_n = 0;
16997f17497SC.J. Collier		priv->txqs = NULL;
17097f17497SC.J. Collier	}
17197f17497SC.J. Collier	if (priv->pd != NULL) {
17297f17497SC.J. Collier		assert(priv->ctx != NULL);
17397f17497SC.J. Collier		claim_zero(ibv_dealloc_pd(priv->pd));
17497f17497SC.J. Collier		claim_zero(ibv_close_device(priv->ctx));
17597f17497SC.J. Collier	} else
17697f17497SC.J. Collier		assert(priv->ctx == NULL);
17797f17497SC.J. Collier	if (priv->rss_conf != NULL) {
17897f17497SC.J. Collier		for (i = 0; (i != hash_rxq_init_n); ++i)
17997f17497SC.J. Collier			rte_free((*priv->rss_conf)[i]);
18097f17497SC.J. Collier		rte_free(priv->rss_conf);
18197f17497SC.J. Collier	}
18297f17497SC.J. Collier	if (priv->reta_idx != NULL)
18397f17497SC.J. Collier		rte_free(priv->reta_idx);
18497f17497SC.J. Collier	priv_unlock(priv);
18597f17497SC.J. Collier	memset(priv, 0, sizeof(*priv));
18697f17497SC.J. Collier}
18797f17497SC.J. Collier
18897f17497SC.J. Collierstatic const struct eth_dev_ops mlx5_dev_ops = {
18997f17497SC.J. Collier	.dev_configure = mlx5_dev_configure,
19097f17497SC.J. Collier	.dev_start = mlx5_dev_start,
19197f17497SC.J. Collier	.dev_stop = mlx5_dev_stop,
19297f17497SC.J. Collier	.dev_set_link_down = mlx5_set_link_down,
19397f17497SC.J. Collier	.dev_set_link_up = mlx5_set_link_up,
19497f17497SC.J. Collier	.dev_close = mlx5_dev_close,
19597f17497SC.J. Collier	.promiscuous_enable = mlx5_promiscuous_enable,
19697f17497SC.J. Collier	.promiscuous_disable = mlx5_promiscuous_disable,
19797f17497SC.J. Collier	.allmulticast_enable = mlx5_allmulticast_enable,
19897f17497SC.J. Collier	.allmulticast_disable = mlx5_allmulticast_disable,
19997f17497SC.J. Collier	.link_update = mlx5_link_update,
20097f17497SC.J. Collier	.stats_get = mlx5_stats_get,
20197f17497SC.J. Collier	.stats_reset = mlx5_stats_reset,
20297f17497SC.J. Collier	.dev_infos_get = mlx5_dev_infos_get,
20397f17497SC.J. Collier	.dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
20497f17497SC.J. Collier	.vlan_filter_set = mlx5_vlan_filter_set,
20597f17497SC.J. Collier	.rx_queue_setup = mlx5_rx_queue_setup,
20697f17497SC.J. Collier	.tx_queue_setup = mlx5_tx_queue_setup,
20797f17497SC.J. Collier	.rx_queue_release = mlx5_rx_queue_release,
20897f17497SC.J. Collier	.tx_queue_release = mlx5_tx_queue_release,
20997f17497SC.J. Collier	.flow_ctrl_get = mlx5_dev_get_flow_ctrl,
21097f17497SC.J. Collier	.flow_ctrl_set = mlx5_dev_set_flow_ctrl,
21197f17497SC.J. Collier	.mac_addr_remove = mlx5_mac_addr_remove,
21297f17497SC.J. Collier	.mac_addr_add = mlx5_mac_addr_add,
21397f17497SC.J. Collier	.mac_addr_set = mlx5_mac_addr_set,
21497f17497SC.J. Collier	.mtu_set = mlx5_dev_set_mtu,
21597f17497SC.J. Collier	.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
21697f17497SC.J. Collier	.vlan_offload_set = mlx5_vlan_offload_set,
21797f17497SC.J. Collier	.reta_update = mlx5_dev_rss_reta_update,
21897f17497SC.J. Collier	.reta_query = mlx5_dev_rss_reta_query,
21997f17497SC.J. Collier	.rss_hash_update = mlx5_rss_hash_update,
22097f17497SC.J. Collier	.rss_hash_conf_get = mlx5_rss_hash_conf_get,
22197f17497SC.J. Collier	.filter_ctrl = mlx5_dev_filter_ctrl,
22297f17497SC.J. Collier};
22397f17497SC.J. Collier
22497f17497SC.J. Collierstatic struct {
22597f17497SC.J. Collier	struct rte_pci_addr pci_addr; /* associated PCI address */
22697f17497SC.J. Collier	uint32_t ports; /* physical ports bitfield. */
22797f17497SC.J. Collier} mlx5_dev[32];
22897f17497SC.J. Collier
22997f17497SC.J. Collier/**
23097f17497SC.J. Collier * Get device index in mlx5_dev[] from PCI bus address.
23197f17497SC.J. Collier *
23297f17497SC.J. Collier * @param[in] pci_addr
23397f17497SC.J. Collier *   PCI bus address to look for.
23497f17497SC.J. Collier *
23597f17497SC.J. Collier * @return
23697f17497SC.J. Collier *   mlx5_dev[] index on success, -1 on failure.
23797f17497SC.J. Collier */
23897f17497SC.J. Collierstatic int
23997f17497SC.J. Colliermlx5_dev_idx(struct rte_pci_addr *pci_addr)
24097f17497SC.J. Collier{
24197f17497SC.J. Collier	unsigned int i;
24297f17497SC.J. Collier	int ret = -1;
24397f17497SC.J. Collier
24497f17497SC.J. Collier	assert(pci_addr != NULL);
24597f17497SC.J. Collier	for (i = 0; (i != RTE_DIM(mlx5_dev)); ++i) {
24697f17497SC.J. Collier		if ((mlx5_dev[i].pci_addr.domain == pci_addr->domain) &&
24797f17497SC.J. Collier		    (mlx5_dev[i].pci_addr.bus == pci_addr->bus) &&
24897f17497SC.J. Collier		    (mlx5_dev[i].pci_addr.devid == pci_addr->devid) &&
24997f17497SC.J. Collier		    (mlx5_dev[i].pci_addr.function == pci_addr->function))
25097f17497SC.J. Collier			return i;
25197f17497SC.J. Collier		if ((mlx5_dev[i].ports == 0) && (ret == -1))
25297f17497SC.J. Collier			ret = i;
25397f17497SC.J. Collier	}
25497f17497SC.J. Collier	return ret;
25597f17497SC.J. Collier}
25697f17497SC.J. Collier
2578b25d1adSChristian Ehrhardt/**
2588b25d1adSChristian Ehrhardt * Verify and store value for device argument.
2598b25d1adSChristian Ehrhardt *
2608b25d1adSChristian Ehrhardt * @param[in] key
2618b25d1adSChristian Ehrhardt *   Key argument to verify.
2628b25d1adSChristian Ehrhardt * @param[in] val
2638b25d1adSChristian Ehrhardt *   Value associated with key.
2648b25d1adSChristian Ehrhardt * @param opaque
2658b25d1adSChristian Ehrhardt *   User data.
2668b25d1adSChristian Ehrhardt *
2678b25d1adSChristian Ehrhardt * @return
2688b25d1adSChristian Ehrhardt *   0 on success, negative errno value on failure.
2698b25d1adSChristian Ehrhardt */
2708b25d1adSChristian Ehrhardtstatic int
2718b25d1adSChristian Ehrhardtmlx5_args_check(const char *key, const char *val, void *opaque)
2728b25d1adSChristian Ehrhardt{
2738b25d1adSChristian Ehrhardt	struct priv *priv = opaque;
2748b25d1adSChristian Ehrhardt	unsigned long tmp;
2758b25d1adSChristian Ehrhardt
2768b25d1adSChristian Ehrhardt	errno = 0;
2778b25d1adSChristian Ehrhardt	tmp = strtoul(val, NULL, 0);
2788b25d1adSChristian Ehrhardt	if (errno) {
2798b25d1adSChristian Ehrhardt		WARN("%s: \"%s\" is not a valid integer", key, val);
2808b25d1adSChristian Ehrhardt		return errno;
2818b25d1adSChristian Ehrhardt	}
2828b25d1adSChristian Ehrhardt	if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
2838b25d1adSChristian Ehrhardt		priv->cqe_comp = !!tmp;
2848b25d1adSChristian Ehrhardt	} else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
2858b25d1adSChristian Ehrhardt		priv->txq_inline = tmp;
2868b25d1adSChristian Ehrhardt	} else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
2878b25d1adSChristian Ehrhardt		priv->txqs_inline = tmp;
2888b25d1adSChristian Ehrhardt	} else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
2898b25d1adSChristian Ehrhardt		priv->mps = !!tmp;
2908b25d1adSChristian Ehrhardt	} else {
2918b25d1adSChristian Ehrhardt		WARN("%s: unknown parameter", key);
2928b25d1adSChristian Ehrhardt		return -EINVAL;
2938b25d1adSChristian Ehrhardt	}
2948b25d1adSChristian Ehrhardt	return 0;
2958b25d1adSChristian Ehrhardt}
2968b25d1adSChristian Ehrhardt
2978b25d1adSChristian Ehrhardt/**
2988b25d1adSChristian Ehrhardt * Parse device parameters.
2998b25d1adSChristian Ehrhardt *
3008b25d1adSChristian Ehrhardt * @param priv
3018b25d1adSChristian Ehrhardt *   Pointer to private structure.
3028b25d1adSChristian Ehrhardt * @param devargs
3038b25d1adSChristian Ehrhardt *   Device arguments structure.
3048b25d1adSChristian Ehrhardt *
3058b25d1adSChristian Ehrhardt * @return
3068b25d1adSChristian Ehrhardt *   0 on success, errno value on failure.
3078b25d1adSChristian Ehrhardt */
3088b25d1adSChristian Ehrhardtstatic int
3098b25d1adSChristian Ehrhardtmlx5_args(struct priv *priv, struct rte_devargs *devargs)
3108b25d1adSChristian Ehrhardt{
3118b25d1adSChristian Ehrhardt	const char **params = (const char *[]){
3128b25d1adSChristian Ehrhardt		MLX5_RXQ_CQE_COMP_EN,
3138b25d1adSChristian Ehrhardt		MLX5_TXQ_INLINE,
3148b25d1adSChristian Ehrhardt		MLX5_TXQS_MIN_INLINE,
3158b25d1adSChristian Ehrhardt		MLX5_TXQ_MPW_EN,
3168b25d1adSChristian Ehrhardt		NULL,
3178b25d1adSChristian Ehrhardt	};
3188b25d1adSChristian Ehrhardt	struct rte_kvargs *kvlist;
3198b25d1adSChristian Ehrhardt	int ret = 0;
3208b25d1adSChristian Ehrhardt	int i;
3218b25d1adSChristian Ehrhardt
3228b25d1adSChristian Ehrhardt	if (devargs == NULL)
3238b25d1adSChristian Ehrhardt		return 0;
3248b25d1adSChristian Ehrhardt	/* Following UGLY cast is done to pass checkpatch. */
3258b25d1adSChristian Ehrhardt	kvlist = rte_kvargs_parse(devargs->args, params);
3268b25d1adSChristian Ehrhardt	if (kvlist == NULL)
3278b25d1adSChristian Ehrhardt		return 0;
3288b25d1adSChristian Ehrhardt	/* Process parameters. */
3298b25d1adSChristian Ehrhardt	for (i = 0; (params[i] != NULL); ++i) {
3308b25d1adSChristian Ehrhardt		if (rte_kvargs_count(kvlist, params[i])) {
3318b25d1adSChristian Ehrhardt			ret = rte_kvargs_process(kvlist, params[i],
3328b25d1adSChristian Ehrhardt						 mlx5_args_check, priv);
333ce3d555eSChristian Ehrhardt			if (ret != 0) {
334ce3d555eSChristian Ehrhardt				rte_kvargs_free(kvlist);
3358b25d1adSChristian Ehrhardt				return ret;
336ce3d555eSChristian Ehrhardt			}
3378b25d1adSChristian Ehrhardt		}
3388b25d1adSChristian Ehrhardt	}
3398b25d1adSChristian Ehrhardt	rte_kvargs_free(kvlist);
3408b25d1adSChristian Ehrhardt	return 0;
3418b25d1adSChristian Ehrhardt}
3428b25d1adSChristian Ehrhardt
34397f17497SC.J. Collierstatic struct eth_driver mlx5_driver;
34497f17497SC.J. Collier
34597f17497SC.J. Collier/**
34697f17497SC.J. Collier * DPDK callback to register a PCI device.
34797f17497SC.J. Collier *
34897f17497SC.J. Collier * This function creates an Ethernet device for each port of a given
34997f17497SC.J. Collier * PCI device.
35097f17497SC.J. Collier *
35197f17497SC.J. Collier * @param[in] pci_drv
35297f17497SC.J. Collier *   PCI driver structure (mlx5_driver).
35397f17497SC.J. Collier * @param[in] pci_dev
35497f17497SC.J. Collier *   PCI device information.
35597f17497SC.J. Collier *
35697f17497SC.J. Collier * @return
35797f17497SC.J. Collier *   0 on success, negative errno value on failure.
35897f17497SC.J. Collier */
35997f17497SC.J. Collierstatic int
3606b3e017eSChristian Ehrhardtmlx5_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
36197f17497SC.J. Collier{
36297f17497SC.J. Collier	struct ibv_device **list;
36397f17497SC.J. Collier	struct ibv_device *ibv_dev;
36497f17497SC.J. Collier	int err = 0;
36597f17497SC.J. Collier	struct ibv_context *attr_ctx = NULL;
36697f17497SC.J. Collier	struct ibv_device_attr device_attr;
3678b25d1adSChristian Ehrhardt	unsigned int sriov;
36897f17497SC.J. Collier	unsigned int mps;
36997f17497SC.J. Collier	int idx;
37097f17497SC.J. Collier	int i;
37197f17497SC.J. Collier
37297f17497SC.J. Collier	(void)pci_drv;
37397f17497SC.J. Collier	assert(pci_drv == &mlx5_driver.pci_drv);
37497f17497SC.J. Collier	/* Get mlx5_dev[] index. */
37597f17497SC.J. Collier	idx = mlx5_dev_idx(&pci_dev->addr);
37697f17497SC.J. Collier	if (idx == -1) {
37797f17497SC.J. Collier		ERROR("this driver cannot support any more adapters");
37897f17497SC.J. Collier		return -ENOMEM;
37997f17497SC.J. Collier	}
38097f17497SC.J. Collier	DEBUG("using driver device index %d", idx);
38197f17497SC.J. Collier
38297f17497SC.J. Collier	/* Save PCI address. */
38397f17497SC.J. Collier	mlx5_dev[idx].pci_addr = pci_dev->addr;
38497f17497SC.J. Collier	list = ibv_get_device_list(&i);
38597f17497SC.J. Collier	if (list == NULL) {
38697f17497SC.J. Collier		assert(errno);
387aab0c291SChristian Ehrhardt		if (errno == ENOSYS)
388aab0c291SChristian Ehrhardt			ERROR("cannot list devices, is ib_uverbs loaded?");
38997f17497SC.J. Collier		return -errno;
39097f17497SC.J. Collier	}
39197f17497SC.J. Collier	assert(i >= 0);
39297f17497SC.J. Collier	/*
39397f17497SC.J. Collier	 * For each listed device, check related sysfs entry against
39497f17497SC.J. Collier	 * the provided PCI ID.
39597f17497SC.J. Collier	 */
39697f17497SC.J. Collier	while (i != 0) {
39797f17497SC.J. Collier		struct rte_pci_addr pci_addr;
39897f17497SC.J. Collier
39997f17497SC.J. Collier		--i;
40097f17497SC.J. Collier		DEBUG("checking device \"%s\"", list[i]->name);
40197f17497SC.J. Collier		if (mlx5_ibv_device_to_pci_addr(list[i], &pci_addr))
40297f17497SC.J. Collier			continue;
40397f17497SC.J. Collier		if ((pci_dev->addr.domain != pci_addr.domain) ||
40497f17497SC.J. Collier		    (pci_dev->addr.bus != pci_addr.bus) ||
40597f17497SC.J. Collier		    (pci_dev->addr.devid != pci_addr.devid) ||
40697f17497SC.J. Collier		    (pci_dev->addr.function != pci_addr.function))
40797f17497SC.J. Collier			continue;
4088b25d1adSChristian Ehrhardt		sriov = ((pci_dev->id.device_id ==
40997f17497SC.J. Collier		       PCI_DEVICE_ID_MELLANOX_CONNECTX4VF) ||
41097f17497SC.J. Collier		      (pci_dev->id.device_id ==
41197f17497SC.J. Collier		       PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF));
41297f17497SC.J. Collier		/* Multi-packet send is only supported by ConnectX-4 Lx PF. */
41397f17497SC.J. Collier		mps = (pci_dev->id.device_id ==
41497f17497SC.J. Collier		       PCI_DEVICE_ID_MELLANOX_CONNECTX4LX);
4158b25d1adSChristian Ehrhardt		INFO("PCI information matches, using device \"%s\""
4168b25d1adSChristian Ehrhardt		     " (SR-IOV: %s, MPS: %s)",
41797f17497SC.J. Collier		     list[i]->name,
4188b25d1adSChristian Ehrhardt		     sriov ? "true" : "false",
41997f17497SC.J. Collier		     mps ? "true" : "false");
42097f17497SC.J. Collier		attr_ctx = ibv_open_device(list[i]);
42197f17497SC.J. Collier		err = errno;
42297f17497SC.J. Collier		break;
42397f17497SC.J. Collier	}
42497f17497SC.J. Collier	if (attr_ctx == NULL) {
42597f17497SC.J. Collier		switch (err) {
42697f17497SC.J. Collier		case 0:
427aab0c291SChristian Ehrhardt			ERROR("cannot access device, is mlx5_ib loaded?");
42843192222SLuca Boccassi			err = ENODEV;
42943192222SLuca Boccassi			break;
43097f17497SC.J. Collier		case EINVAL:
431aab0c291SChristian Ehrhardt			ERROR("cannot use device, are drivers up to date?");
43243192222SLuca Boccassi			break;
43397f17497SC.J. Collier		}
43443192222SLuca Boccassi		goto error;
43597f17497SC.J. Collier	}
43697f17497SC.J. Collier	ibv_dev = list[i];
43797f17497SC.J. Collier
43897f17497SC.J. Collier	DEBUG("device opened");
43997f17497SC.J. Collier	if (ibv_query_device(attr_ctx, &device_attr))
44097f17497SC.J. Collier		goto error;
44197f17497SC.J. Collier	INFO("%u port(s) detected", device_attr.phys_port_cnt);
44297f17497SC.J. Collier
44397f17497SC.J. Collier	for (i = 0; i < device_attr.phys_port_cnt; i++) {
44497f17497SC.J. Collier		uint32_t port = i + 1; /* ports are indexed from one */
44597f17497SC.J. Collier		uint32_t test = (1 << i);
44697f17497SC.J. Collier		struct ibv_context *ctx = NULL;
44797f17497SC.J. Collier		struct ibv_port_attr port_attr;
44897f17497SC.J. Collier		struct ibv_pd *pd = NULL;
44997f17497SC.J. Collier		struct priv *priv = NULL;
45097f17497SC.J. Collier		struct rte_eth_dev *eth_dev;
45197f17497SC.J. Collier		struct ibv_exp_device_attr exp_device_attr;
45297f17497SC.J. Collier		struct ether_addr mac;
4538b25d1adSChristian Ehrhardt		uint16_t num_vfs = 0;
45497f17497SC.J. Collier
45597f17497SC.J. Collier		exp_device_attr.comp_mask =
45697f17497SC.J. Collier			IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS |
45797f17497SC.J. Collier			IBV_EXP_DEVICE_ATTR_RX_HASH |
46097f17497SC.J. Collier			0;
46197f17497SC.J. Collier
46297f17497SC.J. Collier		DEBUG("using port %u (%08" PRIx32 ")", port, test);
46397f17497SC.J. Collier
46497f17497SC.J. Collier		ctx = ibv_open_device(ibv_dev);
46547d9763aSLuca Boccassi		if (ctx == NULL) {
46647d9763aSLuca Boccassi			err = ENODEV;
46797f17497SC.J. Collier			goto port_error;
46847d9763aSLuca Boccassi		}
46997f17497SC.J. Collier
47097f17497SC.J. Collier		/* Check port status. */
47197f17497SC.J. Collier		err = ibv_query_port(ctx, port, &port_attr);
47297f17497SC.J. Collier		if (err) {
47397f17497SC.J. Collier			ERROR("port query failed: %s", strerror(err));
47497f17497SC.J. Collier			goto port_error;
47597f17497SC.J. Collier		}
47697f17497SC.J. Collier
47797f17497SC.J. Collier		if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
47897f17497SC.J. Collier			ERROR("port %d is not configured in Ethernet mode",
47997f17497SC.J. Collier			      port);
48047d9763aSLuca Boccassi			err = EINVAL;
48197f17497SC.J. Collier			goto port_error;
48297f17497SC.J. Collier		}
48397f17497SC.J. Collier
48497f17497SC.J. Collier		if (port_attr.state != IBV_PORT_ACTIVE)
48597f17497SC.J. Collier			DEBUG("port %d is not active: \"%s\" (%d)",
48697f17497SC.J. Collier			      port, ibv_port_state_str(port_attr.state),
48797f17497SC.J. Collier			      port_attr.state);
48897f17497SC.J. Collier
48997f17497SC.J. Collier		/* Allocate protection domain. */
49097f17497SC.J. Collier		pd = ibv_alloc_pd(ctx);
49197f17497SC.J. Collier		if (pd == NULL) {
49297f17497SC.J. Collier			ERROR("PD allocation failure");
49397f17497SC.J. Collier			err = ENOMEM;
49497f17497SC.J. Collier			goto port_error;
49597f17497SC.J. Collier		}
49697f17497SC.J. Collier
49797f17497SC.J. Collier		mlx5_dev[idx].ports |= test;
49897f17497SC.J. Collier
49997f17497SC.J. Collier		/* from rte_ethdev.c */
50097f17497SC.J. Collier		priv = rte_zmalloc("ethdev private structure",
50197f17497SC.J. Collier				   sizeof(*priv),
50297f17497SC.J. Collier				   RTE_CACHE_LINE_SIZE);
50397f17497SC.J. Collier		if (priv == NULL) {
50497f17497SC.J. Collier			ERROR("priv allocation failure");
50597f17497SC.J. Collier			err = ENOMEM;
50697f17497SC.J. Collier			goto port_error;
50797f17497SC.J. Collier		}
50897f17497SC.J. Collier
50997f17497SC.J. Collier		priv->ctx = ctx;
51097f17497SC.J. Collier		priv->device_attr = device_attr;
51197f17497SC.J. Collier		priv->port = port;
51297f17497SC.J. Collier		priv->pd = pd;
51397f17497SC.J. Collier		priv->mtu = ETHER_MTU;
5148b25d1adSChristian Ehrhardt		priv->mps = mps; /* Enable MPW by default if supported. */
5158b25d1adSChristian Ehrhardt		priv->cqe_comp = 1; /* Enable compression by default. */
5166b3e017eSChristian Ehrhardt		err = mlx5_args(priv, pci_dev->device.devargs);
5178b25d1adSChristian Ehrhardt		if (err) {
5188b25d1adSChristian Ehrhardt			ERROR("failed to process device arguments: %s",
5198b25d1adSChristian Ehrhardt			      strerror(err));
5208b25d1adSChristian Ehrhardt			goto port_error;
5218b25d1adSChristian Ehrhardt		}
52297f17497SC.J. Collier		if (ibv_exp_query_device(ctx, &exp_device_attr)) {
52397f17497SC.J. Collier			ERROR("ibv_exp_query_device() failed");
52447d9763aSLuca Boccassi			err = ENODEV;
52597f17497SC.J. Collier			goto port_error;
52697f17497SC.J. Collier		}
52797f17497SC.J. Collier
52897f17497SC.J. Collier		priv->hw_csum =
52997f17497SC.J. Collier			((exp_device_attr.exp_device_cap_flags &
53097f17497SC.J. Collier			  IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
53197f17497SC.J. Collier			 (exp_device_attr.exp_device_cap_flags &
53297f17497SC.J. Collier			  IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
53397f17497SC.J. Collier		DEBUG("checksum offloading is %ssupported",
53497f17497SC.J. Collier		      (priv->hw_csum ? "" : "not "));
53597f17497SC.J. Collier
53697f17497SC.J. Collier		priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
53797f17497SC.J. Collier					 IBV_EXP_DEVICE_VXLAN_SUPPORT);
53897f17497SC.J. Collier		DEBUG("L2 tunnel checksum offloads are %ssupported",
53997f17497SC.J. Collier		      (priv->hw_csum_l2tun ? "" : "not "));
54097f17497SC.J. Collier
54197f17497SC.J. Collier		priv->ind_table_max_size = exp_device_attr.rx_hash_caps.max_rwq_indirection_table_size;
54297f17497SC.J. Collier		/* Remove this check once DPDK supports larger/variable
54397f17497SC.J. Collier		 * indirection tables. */
54497f17497SC.J. Collier		if (priv->ind_table_max_size > (unsigned int)RSS_INDIRECTION_TABLE_SIZE)
54597f17497SC.J. Collier			priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
54697f17497SC.J. Collier		DEBUG("maximum RX indirection table size is %u",
54797f17497SC.J. Collier		      priv->ind_table_max_size);
54897f17497SC.J. Collier		priv->hw_vlan_strip = !!(exp_device_attr.wq_vlan_offloads_cap &
54997f17497SC.J. Collier					 IBV_EXP_RECEIVE_WQ_CVLAN_STRIP);
55097f17497SC.J. Collier		DEBUG("VLAN stripping is %ssupported",
55197f17497SC.J. Collier		      (priv->hw_vlan_strip ? "" : "not "));
55297f17497SC.J. Collier
55397f17497SC.J. Collier		priv->hw_fcs_strip = !!(exp_device_attr.exp_device_cap_flags &
55497f17497SC.J. Collier					IBV_EXP_DEVICE_SCATTER_FCS);
55597f17497SC.J. Collier		DEBUG("FCS stripping configuration is %ssupported",
55697f17497SC.J. Collier		      (priv->hw_fcs_strip ? "" : "not "));
55797f17497SC.J. Collier
55897f17497SC.J. Collier		priv->hw_padding = !!exp_device_attr.rx_pad_end_addr_align;
55997f17497SC.J. Collier		DEBUG("hardware RX end alignment padding is %ssupported",
56097f17497SC.J. Collier		      (priv->hw_padding ? "" : "not "));
56197f17497SC.J. Collier
5628b25d1adSChristian Ehrhardt		priv_get_num_vfs(priv, &num_vfs);
5638b25d1adSChristian Ehrhardt		priv->sriov = (num_vfs || sriov);
5648b25d1adSChristian Ehrhardt		if (priv->mps && !mps) {
5658b25d1adSChristian Ehrhardt			ERROR("multi-packet send not supported on this device"
5668b25d1adSChristian Ehrhardt			      " (" MLX5_TXQ_MPW_EN ")");
5678b25d1adSChristian Ehrhardt			err = ENOTSUP;
5688b25d1adSChristian Ehrhardt			goto port_error;
5698b25d1adSChristian Ehrhardt		}
57097f17497SC.J. Collier		/* Allocate and register default RSS hash keys. */
57197f17497SC.J. Collier		priv->rss_conf = rte_calloc(__func__, hash_rxq_init_n,
57297f17497SC.J. Collier					    sizeof((*priv->rss_conf)[0]), 0);
57397f17497SC.J. Collier		if (priv->rss_conf == NULL) {
57497f17497SC.J. Collier			err = ENOMEM;
57597f17497SC.J. Collier			goto port_error;
57697f17497SC.J. Collier		}
57797f17497SC.J. Collier		err = rss_hash_rss_conf_new_key(priv,
57897f17497SC.J. Collier						rss_hash_default_key,
57997f17497SC.J. Collier						rss_hash_default_key_len,
58097f17497SC.J. Collier						ETH_RSS_PROTO_MASK);
58197f17497SC.J. Collier		if (err)
58297f17497SC.J. Collier			goto port_error;
58397f17497SC.J. Collier		/* Configure the first MAC address by default. */
58497f17497SC.J. Collier		if (priv_get_mac(priv, &mac.addr_bytes)) {
58597f17497SC.J. Collier			ERROR("cannot get MAC address, is mlx5_en loaded?"
58697f17497SC.J. Collier			      " (errno: %s)", strerror(errno));
58747d9763aSLuca Boccassi			err = ENODEV;
58897f17497SC.J. Collier			goto port_error;
58997f17497SC.J. Collier		}
59097f17497SC.J. Collier		INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
59197f17497SC.J. Collier		     priv->port,
59297f17497SC.J. Collier		     mac.addr_bytes[0], mac.addr_bytes[1],
59397f17497SC.J. Collier		     mac.addr_bytes[2], mac.addr_bytes[3],
59497f17497SC.J. Collier		     mac.addr_bytes[4], mac.addr_bytes[5]);
59597f17497SC.J. Collier		/* Register MAC address. */
59697f17497SC.J. Collier		claim_zero(priv_mac_addr_add(priv, 0,
59797f17497SC.J. Collier					     (const uint8_t (*)[ETHER_ADDR_LEN])
59897f17497SC.J. Collier					     mac.addr_bytes));
59997f17497SC.J. Collier		/* Initialize FD filters list. */
60097f17497SC.J. Collier		err = fdir_init_filters_list(priv);
60197f17497SC.J. Collier		if (err)
60297f17497SC.J. Collier			goto port_error;
60397f17497SC.J. Collier#ifndef NDEBUG
60497f17497SC.J. Collier		{
60597f17497SC.J. Collier			char ifname[IF_NAMESIZE];
60697f17497SC.J. Collier
60797f17497SC.J. Collier			if (priv_get_ifname(priv, &ifname) == 0)
60897f17497SC.J. Collier				DEBUG("port %u ifname is \"%s\"",
60997f17497SC.J. Collier				      priv->port, ifname);
61097f17497SC.J. Collier			else
61197f17497SC.J. Collier				DEBUG("port %u ifname is unknown", priv->port);
61297f17497SC.J. Collier		}
61397f17497SC.J. Collier#endif
61497f17497SC.J. Collier		/* Get actual MTU if possible. */
61597f17497SC.J. Collier		priv_get_mtu(priv, &priv->mtu);
61697f17497SC.J. Collier		DEBUG("port %u MTU is %u", priv->port, priv->mtu);
61797f17497SC.J. Collier
61897f17497SC.J. Collier		/* from rte_ethdev.c */
61997f17497SC.J. Collier		{
62097f17497SC.J. Collier			char name[RTE_ETH_NAME_MAX_LEN];
62197f17497SC.J. Collier
62297f17497SC.J. Collier			snprintf(name, sizeof(name), "%s port %u",
62397f17497SC.J. Collier				 ibv_get_device_name(ibv_dev), port);
6246b3e017eSChristian Ehrhardt			eth_dev = rte_eth_dev_allocate(name);
62597f17497SC.J. Collier		}
62697f17497SC.J. Collier		if (eth_dev == NULL) {
62797f17497SC.J. Collier			ERROR("can not allocate rte ethdev");
62897f17497SC.J. Collier			err = ENOMEM;
62997f17497SC.J. Collier			goto port_error;
63097f17497SC.J. Collier		}
63197f17497SC.J. Collier
63297f17497SC.J. Collier		/* Secondary processes have to use local storage for their
63397f17497SC.J. Collier		 * private data as well as a copy of eth_dev->data, but this
63497f17497SC.J. Collier		 * pointer must not be modified before burst functions are
63597f17497SC.J. Collier		 * actually called. */
63697f17497SC.J. Collier		if (mlx5_is_secondary()) {
63797f17497SC.J. Collier			struct mlx5_secondary_data *sd =
63897f17497SC.J. Collier				&mlx5_secondary_data[eth_dev->data->port_id];
63997f17497SC.J. Collier			sd->primary_priv = eth_dev->data->dev_private;
64097f17497SC.J. Collier			if (sd->primary_priv == NULL) {
64197f17497SC.J. Collier				ERROR("no private data for port %u",
64297f17497SC.J. Collier						eth_dev->data->port_id);
64397f17497SC.J. Collier				err = EINVAL;
64497f17497SC.J. Collier				goto port_error;
64597f17497SC.J. Collier			}
64697f17497SC.J. Collier			sd->shared_dev_data = eth_dev->data;
64797f17497SC.J. Collier			rte_spinlock_init(&sd->lock);
64897f17497SC.J. Collier			memcpy(sd->data.name, sd->shared_dev_data->name,
64997f17497SC.J. Collier				   sizeof(sd->data.name));
65097f17497SC.J. Collier			sd->data.dev_private = priv;
65197f17497SC.J. Collier			sd->data.rx_mbuf_alloc_failed = 0;
65297f17497SC.J. Collier			sd->data.mtu = ETHER_MTU;
65397f17497SC.J. Collier			sd->data.port_id = sd->shared_dev_data->port_id;
65497f17497SC.J. Collier			sd->data.mac_addrs = priv->mac;
65597f17497SC.J. Collier			eth_dev->tx_pkt_burst = mlx5_tx_burst_secondary_setup;
65697f17497SC.J. Collier			eth_dev->rx_pkt_burst = mlx5_rx_burst_secondary_setup;
65797f17497SC.J. Collier		} else {
65897f17497SC.J. Collier			eth_dev->data->dev_private = priv;
65997f17497SC.J. Collier			eth_dev->data->rx_mbuf_alloc_failed = 0;
66097f17497SC.J. Collier			eth_dev->data->mtu = ETHER_MTU;
66197f17497SC.J. Collier			eth_dev->data->mac_addrs = priv->mac;
66297f17497SC.J. Collier		}
66397f17497SC.J. Collier
66497f17497SC.J. Collier		eth_dev->pci_dev = pci_dev;
66597f17497SC.J. Collier		rte_eth_copy_pci_info(eth_dev, pci_dev);
66697f17497SC.J. Collier		eth_dev->driver = &mlx5_driver;
66797f17497SC.J. Collier		priv->dev = eth_dev;
66897f17497SC.J. Collier		eth_dev->dev_ops = &mlx5_dev_ops;
66997f17497SC.J. Collier
67097f17497SC.J. Collier		TAILQ_INIT(&eth_dev->link_intr_cbs);
67197f17497SC.J. Collier
67297f17497SC.J. Collier		/* Bring Ethernet device up. */
67397f17497SC.J. Collier		DEBUG("forcing Ethernet interface up");
67497f17497SC.J. Collier		priv_set_flags(priv, ~IFF_UP, IFF_UP);
67532e04ea0SChristian Ehrhardt		mlx5_link_update_unlocked(priv->dev, 1);
67697f17497SC.J. Collier		continue;
67797f17497SC.J. Collier
67897f17497SC.J. Collierport_error:
67997f17497SC.J. Collier		if (priv) {
68097f17497SC.J. Collier			rte_free(priv->rss_conf);
68197f17497SC.J. Collier			rte_free(priv);
68297f17497SC.J. Collier		}
68397f17497SC.J. Collier		if (pd)
68497f17497SC.J. Collier			claim_zero(ibv_dealloc_pd(pd));
68597f17497SC.J. Collier		if (ctx)
68697f17497SC.J. Collier			claim_zero(ibv_close_device(ctx));
68743192222SLuca Boccassi		if (eth_dev && rte_eal_process_type() == RTE_PROC_PRIMARY)
68843192222SLuca Boccassi			rte_eth_dev_release_port(eth_dev);
68997f17497SC.J. Collier		break;
69097f17497SC.J. Collier	}
69197f17497SC.J. Collier
69297f17497SC.J. Collier	/*
69397f17497SC.J. Collier	 * XXX if something went wrong in the loop above, there is a resource
69497f17497SC.J. Collier	 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
69597f17497SC.J. Collier	 * long as the dpdk does not provide a way to deallocate a ethdev and a
69697f17497SC.J. Collier	 * way to enumerate the registered ethdevs to free the previous ones.
69797f17497SC.J. Collier	 */
69897f17497SC.J. Collier
69997f17497SC.J. Collier	/* no port found, complain */
70097f17497SC.J. Collier	if (!mlx5_dev[idx].ports) {
70197f17497SC.J. Collier		err = ENODEV;
70297f17497SC.J. Collier		goto error;
70397f17497SC.J. Collier	}
70497f17497SC.J. Collier
70597f17497SC.J. Colliererror:
70697f17497SC.J. Collier	if (attr_ctx)
70797f17497SC.J. Collier		claim_zero(ibv_close_device(attr_ctx));
70897f17497SC.J. Collier	if (list)
70997f17497SC.J. Collier		ibv_free_device_list(list);
71097f17497SC.J. Collier	assert(err >= 0);
71197f17497SC.J. Collier	return -err;
71297f17497SC.J. Collier}
71397f17497SC.J. Collier
71497f17497SC.J. Collierstatic const struct rte_pci_id mlx5_pci_id_map[] = {
71597f17497SC.J. Collier	{
7168b25d1adSChristian Ehrhardt		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
7178b25d1adSChristian Ehrhardt			       PCI_DEVICE_ID_MELLANOX_CONNECTX4)
71897f17497SC.J. Collier	},
71997f17497SC.J. Collier	{
7208b25d1adSChristian Ehrhardt		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
7218b25d1adSChristian Ehrhardt			       PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
72297f17497SC.J. Collier	},
72397f17497SC.J. Collier	{
7248b25d1adSChristian Ehrhardt		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
7258b25d1adSChristian Ehrhardt			       PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
72697f17497SC.J. Collier	},
72797f17497SC.J. Collier	{
7288b25d1adSChristian Ehrhardt		RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
7298b25d1adSChristian Ehrhardt			       PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
73097f17497SC.J. Collier	},
73197f17497SC.J. Collier	{
73297f17497SC.J. Collier		.vendor_id = 0
73397f17497SC.J. Collier	}
73497f17497SC.J. Collier};
73597f17497SC.J. Collier
73697f17497SC.J. Collierstatic struct eth_driver mlx5_driver = {
73797f17497SC.J. Collier	.pci_drv = {
7386b3e017eSChristian Ehrhardt		.driver = {
7396b3e017eSChristian Ehrhardt			.name = MLX5_DRIVER_NAME
7406b3e017eSChristian Ehrhardt		},
74197f17497SC.J. Collier		.id_table = mlx5_pci_id_map,
7426b3e017eSChristian Ehrhardt		.probe = mlx5_pci_probe,
74397f17497SC.J. Collier		.drv_flags = RTE_PCI_DRV_INTR_LSC,
74497f17497SC.J. Collier	},
74597f17497SC.J. Collier	.dev_private_size = sizeof(struct priv)
74697f17497SC.J. Collier};
74797f17497SC.J. Collier
74897f17497SC.J. Collier/**
74997f17497SC.J. Collier * Driver initialization routine.
75097f17497SC.J. Collier */
7516b3e017eSChristian EhrhardtRTE_INIT(rte_mlx5_pmd_init);
7526b3e017eSChristian Ehrhardtstatic void
7536b3e017eSChristian Ehrhardtrte_mlx5_pmd_init(void)
75497f17497SC.J. Collier{
75597f17497SC.J. Collier	/*
75697f17497SC.J. Collier	 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
75797f17497SC.J. Collier	 * huge pages. Calling ibv_fork_init() during init allows
75897f17497SC.J. Collier	 * applications to use fork() safely for purposes other than
75997f17497SC.J. Collier	 * using this PMD, which is not supported in forked processes.
76097f17497SC.J. Collier	 */
76197f17497SC.J. Collier	setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
76297f17497SC.J. Collier	ibv_fork_init();
76397f17497SC.J. Collier	rte_eal_pci_register(&mlx5_driver.pci_drv);
76497f17497SC.J. Collier}
76597f17497SC.J. Collier
7666b3e017eSChristian EhrhardtRTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
7676b3e017eSChristian EhrhardtRTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);