1/*-
2 *   BSD LICENSE
3 *
4 *   Copyright 2015 6WIND S.A.
5 *   Copyright 2015 Mellanox.
6 *
7 *   Redistribution and use in source and binary forms, with or without
8 *   modification, are permitted provided that the following conditions
9 *   are met:
10 *
11 *     * Redistributions of source code must retain the above copyright
12 *       notice, this list of conditions and the following disclaimer.
13 *     * Redistributions in binary form must reproduce the above copyright
14 *       notice, this list of conditions and the following disclaimer in
15 *       the documentation and/or other materials provided with the
16 *       distribution.
17 *     * Neither the name of 6WIND S.A. nor the names of its
18 *       contributors may be used to endorse or promote products derived
19 *       from this software without specific prior written permission.
20 *
21 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef RTE_PMD_MLX5_H_
35#define RTE_PMD_MLX5_H_
36
37#include <stddef.h>
38#include <stdint.h>
39#include <limits.h>
40#include <net/if.h>
41#include <netinet/in.h>
42
43/* Verbs header. */
44/* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
45#ifdef PEDANTIC
46#pragma GCC diagnostic ignored "-Wpedantic"
47#endif
48#include <infiniband/verbs.h>
49#ifdef PEDANTIC
50#pragma GCC diagnostic error "-Wpedantic"
51#endif
52
53/* DPDK headers don't like -pedantic. */
54#ifdef PEDANTIC
55#pragma GCC diagnostic ignored "-Wpedantic"
56#endif
57#include <rte_ether.h>
58#include <rte_ethdev.h>
59#include <rte_spinlock.h>
60#include <rte_interrupts.h>
61#include <rte_errno.h>
62#ifdef PEDANTIC
63#pragma GCC diagnostic error "-Wpedantic"
64#endif
65
66#include "mlx5_utils.h"
67#include "mlx5_rxtx.h"
68#include "mlx5_autoconf.h"
69#include "mlx5_defs.h"
70
71#if !defined(HAVE_VERBS_IBV_EXP_CQ_COMPRESSED_CQE) || \
72	!defined(HAVE_VERBS_MLX5_ETH_VLAN_INLINE_HEADER_SIZE)
73#error Mellanox OFED >= 3.3 is required, please refer to the documentation.
74#endif
75
76enum {
77	PCI_VENDOR_ID_MELLANOX = 0x15b3,
78};
79
80enum {
81	PCI_DEVICE_ID_MELLANOX_CONNECTX4 = 0x1013,
82	PCI_DEVICE_ID_MELLANOX_CONNECTX4VF = 0x1014,
83	PCI_DEVICE_ID_MELLANOX_CONNECTX4LX = 0x1015,
84	PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF = 0x1016,
85};
86
87struct priv {
88	struct rte_eth_dev *dev; /* Ethernet device. */
89	struct ibv_context *ctx; /* Verbs context. */
90	struct ibv_device_attr device_attr; /* Device properties. */
91	struct ibv_pd *pd; /* Protection Domain. */
92	/*
93	 * MAC addresses array and configuration bit-field.
94	 * An extra entry that cannot be modified by the DPDK is reserved
95	 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
96	 */
97	struct ether_addr mac[MLX5_MAX_MAC_ADDRESSES];
98	BITFIELD_DECLARE(mac_configured, uint32_t, MLX5_MAX_MAC_ADDRESSES);
99	uint16_t vlan_filter[MLX5_MAX_VLAN_IDS]; /* VLAN filters table. */
100	unsigned int vlan_filter_n; /* Number of configured VLAN filters. */
101	/* Device properties. */
102	uint16_t mtu; /* Configured MTU. */
103	uint8_t port; /* Physical port number. */
104	unsigned int started:1; /* Device started, flows enabled. */
105	unsigned int promisc_req:1; /* Promiscuous mode requested. */
106	unsigned int allmulti_req:1; /* All multicast mode requested. */
107	unsigned int hw_csum:1; /* Checksum offload is supported. */
108	unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
109	unsigned int hw_vlan_strip:1; /* VLAN stripping is supported. */
110	unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */
111	unsigned int hw_padding:1; /* End alignment padding is supported. */
112	unsigned int sriov:1; /* This is a VF or PF with VF devices. */
113	unsigned int mps:1; /* Whether multi-packet send is supported. */
114	unsigned int cqe_comp:1; /* Whether CQE compression is enabled. */
115	unsigned int pending_alarm:1; /* An alarm is pending. */
116	unsigned int txq_inline; /* Maximum packet size for inlining. */
117	unsigned int txqs_inline; /* Queue number threshold for inlining. */
118	/* RX/TX queues. */
119	unsigned int rxqs_n; /* RX queues array size. */
120	unsigned int txqs_n; /* TX queues array size. */
121	struct rxq *(*rxqs)[]; /* RX queues. */
122	struct txq *(*txqs)[]; /* TX queues. */
123	/* Indirection tables referencing all RX WQs. */
124	struct ibv_exp_rwq_ind_table *(*ind_tables)[];
125	unsigned int ind_tables_n; /* Number of indirection tables. */
126	unsigned int ind_table_max_size; /* Maximum indirection table size. */
127	/* Hash RX QPs feeding the indirection table. */
128	struct hash_rxq (*hash_rxqs)[];
129	unsigned int hash_rxqs_n; /* Hash RX QPs array size. */
130	/* RSS configuration array indexed by hash RX queue type. */
131	struct rte_eth_rss_conf *(*rss_conf)[];
132	uint64_t rss_hf; /* RSS DPDK bit field of active RSS. */
133	struct rte_intr_handle intr_handle; /* Interrupt handler. */
134	unsigned int (*reta_idx)[]; /* RETA index table. */
135	unsigned int reta_idx_n; /* RETA index size. */
136	struct fdir_filter_list *fdir_filter_list; /* Flow director rules. */
137	struct fdir_queue *fdir_drop_queue; /* Flow director drop queue. */
138	uint32_t link_speed_capa; /* Link speed capabilities. */
139	rte_spinlock_t lock; /* Lock for control functions. */
140};
141
142/* Local storage for secondary process data. */
143struct mlx5_secondary_data {
144	struct rte_eth_dev_data data; /* Local device data. */
145	struct priv *primary_priv; /* Private structure from primary. */
146	struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
147	rte_spinlock_t lock; /* Port configuration lock. */
148} mlx5_secondary_data[RTE_MAX_ETHPORTS];
149
150/**
151 * Lock private structure to protect it from concurrent access in the
152 * control path.
153 *
154 * @param priv
155 *   Pointer to private structure.
156 */
157static inline void
158priv_lock(struct priv *priv)
159{
160	rte_spinlock_lock(&priv->lock);
161}
162
163/**
164 * Try to lock private structure to protect it from concurrent access in the
165 * control path.
166 *
167 * @param priv
168 *   Pointer to private structure.
169 *
170 * @return
171 *   1 if the lock is successfully taken; 0 otherwise.
172 */
173static inline int
174priv_trylock(struct priv *priv)
175{
176	return rte_spinlock_trylock(&priv->lock);
177}
178
179/**
180 * Unlock private structure.
181 *
182 * @param priv
183 *   Pointer to private structure.
184 */
185static inline void
186priv_unlock(struct priv *priv)
187{
188	rte_spinlock_unlock(&priv->lock);
189}
190
191/* mlx5.c */
192
193int mlx5_getenv_int(const char *);
194
195/* mlx5_ethdev.c */
196
197struct priv *mlx5_get_priv(struct rte_eth_dev *dev);
198int mlx5_is_secondary(void);
199int priv_get_ifname(const struct priv *, char (*)[IF_NAMESIZE]);
200int priv_ifreq(const struct priv *, int req, struct ifreq *);
201int priv_get_num_vfs(struct priv *, uint16_t *);
202int priv_get_mtu(struct priv *, uint16_t *);
203int priv_set_flags(struct priv *, unsigned int, unsigned int);
204int mlx5_dev_configure(struct rte_eth_dev *);
205void mlx5_dev_infos_get(struct rte_eth_dev *, struct rte_eth_dev_info *);
206const uint32_t *mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev);
207int mlx5_link_update_unlocked(struct rte_eth_dev *, int);
208int mlx5_link_update(struct rte_eth_dev *, int);
209int mlx5_dev_set_mtu(struct rte_eth_dev *, uint16_t);
210int mlx5_dev_get_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
211int mlx5_dev_set_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
212int mlx5_ibv_device_to_pci_addr(const struct ibv_device *,
213				struct rte_pci_addr *);
214void mlx5_dev_link_status_handler(void *);
215void mlx5_dev_interrupt_handler(struct rte_intr_handle *, void *);
216void priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
217void priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
218int mlx5_set_link_down(struct rte_eth_dev *dev);
219int mlx5_set_link_up(struct rte_eth_dev *dev);
220struct priv *mlx5_secondary_data_setup(struct priv *priv);
221void priv_select_tx_function(struct priv *);
222void priv_select_rx_function(struct priv *);
223
224/* mlx5_mac.c */
225
226int priv_get_mac(struct priv *, uint8_t (*)[ETHER_ADDR_LEN]);
227void hash_rxq_mac_addrs_del(struct hash_rxq *);
228void priv_mac_addrs_disable(struct priv *);
229void mlx5_mac_addr_remove(struct rte_eth_dev *, uint32_t);
230int hash_rxq_mac_addrs_add(struct hash_rxq *);
231int priv_mac_addr_add(struct priv *, unsigned int,
232		      const uint8_t (*)[ETHER_ADDR_LEN]);
233int priv_mac_addrs_enable(struct priv *);
234void mlx5_mac_addr_add(struct rte_eth_dev *, struct ether_addr *, uint32_t,
235		       uint32_t);
236void mlx5_mac_addr_set(struct rte_eth_dev *, struct ether_addr *);
237
238/* mlx5_rss.c */
239
240int rss_hash_rss_conf_new_key(struct priv *, const uint8_t *, unsigned int,
241			      uint64_t);
242int mlx5_rss_hash_update(struct rte_eth_dev *, struct rte_eth_rss_conf *);
243int mlx5_rss_hash_conf_get(struct rte_eth_dev *, struct rte_eth_rss_conf *);
244int priv_rss_reta_index_resize(struct priv *, unsigned int);
245int mlx5_dev_rss_reta_query(struct rte_eth_dev *,
246			    struct rte_eth_rss_reta_entry64 *, uint16_t);
247int mlx5_dev_rss_reta_update(struct rte_eth_dev *,
248			     struct rte_eth_rss_reta_entry64 *, uint16_t);
249
250/* mlx5_rxmode.c */
251
252int priv_special_flow_enable(struct priv *, enum hash_rxq_flow_type);
253void priv_special_flow_disable(struct priv *, enum hash_rxq_flow_type);
254int priv_special_flow_enable_all(struct priv *);
255void priv_special_flow_disable_all(struct priv *);
256void mlx5_promiscuous_enable(struct rte_eth_dev *);
257void mlx5_promiscuous_disable(struct rte_eth_dev *);
258void mlx5_allmulticast_enable(struct rte_eth_dev *);
259void mlx5_allmulticast_disable(struct rte_eth_dev *);
260
261/* mlx5_stats.c */
262
263void mlx5_stats_get(struct rte_eth_dev *, struct rte_eth_stats *);
264void mlx5_stats_reset(struct rte_eth_dev *);
265
266/* mlx5_vlan.c */
267
268int mlx5_vlan_filter_set(struct rte_eth_dev *, uint16_t, int);
269void mlx5_vlan_offload_set(struct rte_eth_dev *, int);
270void mlx5_vlan_strip_queue_set(struct rte_eth_dev *, uint16_t, int);
271
272/* mlx5_trigger.c */
273
274int mlx5_dev_start(struct rte_eth_dev *);
275void mlx5_dev_stop(struct rte_eth_dev *);
276
277/* mlx5_fdir.c */
278
279void priv_fdir_queue_destroy(struct priv *, struct fdir_queue *);
280int fdir_init_filters_list(struct priv *);
281void priv_fdir_delete_filters_list(struct priv *);
282void priv_fdir_disable(struct priv *);
283void priv_fdir_enable(struct priv *);
284int mlx5_dev_filter_ctrl(struct rte_eth_dev *, enum rte_filter_type,
285			 enum rte_filter_op, void *);
286
287#endif /* RTE_PMD_MLX5_H_ */
288