rte_ethdev.c revision 8be94df6
1/*-
2 *   BSD LICENSE
3 *
4 *   Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
5 *   All rights reserved.
6 *
7 *   Redistribution and use in source and binary forms, with or without
8 *   modification, are permitted provided that the following conditions
9 *   are met:
10 *
11 *     * Redistributions of source code must retain the above copyright
12 *       notice, this list of conditions and the following disclaimer.
13 *     * Redistributions in binary form must reproduce the above copyright
14 *       notice, this list of conditions and the following disclaimer in
15 *       the documentation and/or other materials provided with the
16 *       distribution.
17 *     * Neither the name of Intel Corporation nor the names of its
18 *       contributors may be used to endorse or promote products derived
19 *       from this software without specific prior written permission.
20 *
21 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#include <sys/types.h>
35#include <sys/queue.h>
36#include <ctype.h>
37#include <stdio.h>
38#include <stdlib.h>
39#include <string.h>
40#include <stdarg.h>
41#include <errno.h>
42#include <stdint.h>
43#include <inttypes.h>
44#include <netinet/in.h>
45
46#include <rte_byteorder.h>
47#include <rte_log.h>
48#include <rte_debug.h>
49#include <rte_interrupts.h>
50#include <rte_pci.h>
51#include <rte_memory.h>
52#include <rte_memcpy.h>
53#include <rte_memzone.h>
54#include <rte_launch.h>
55#include <rte_eal.h>
56#include <rte_per_lcore.h>
57#include <rte_lcore.h>
58#include <rte_atomic.h>
59#include <rte_branch_prediction.h>
60#include <rte_common.h>
61#include <rte_ring.h>
62#include <rte_mempool.h>
63#include <rte_malloc.h>
64#include <rte_mbuf.h>
65#include <rte_errno.h>
66#include <rte_spinlock.h>
67#include <rte_string_fns.h>
68
69#include "rte_ether.h"
70#include "rte_ethdev.h"
71
72static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
73struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
74static struct rte_eth_dev_data *rte_eth_dev_data;
75static uint8_t nb_ports;
76
77/* spinlock for eth device callbacks */
78static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
79
80/* spinlock for add/remove rx callbacks */
81static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
82
83/* spinlock for add/remove tx callbacks */
84static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
85
86/* store statistics names and its offset in stats structure  */
87struct rte_eth_xstats_name_off {
88	char name[RTE_ETH_XSTATS_NAME_SIZE];
89	unsigned offset;
90};
91
92static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93	{"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94	{"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95	{"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96	{"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97	{"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98	{"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99	{"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
100		rx_nombuf)},
101};
102
103#define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
104
105static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106	{"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107	{"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108	{"errors", offsetof(struct rte_eth_stats, q_errors)},
109};
110
111#define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) /	\
112		sizeof(rte_rxq_stats_strings[0]))
113
114static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115	{"packets", offsetof(struct rte_eth_stats, q_opackets)},
116	{"bytes", offsetof(struct rte_eth_stats, q_obytes)},
117};
118#define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) /	\
119		sizeof(rte_txq_stats_strings[0]))
120
121
122/**
123 * The user application callback description.
124 *
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
127 */
128struct rte_eth_dev_callback {
129	TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130	rte_eth_dev_cb_fn cb_fn;                /**< Callback address */
131	void *cb_arg;                           /**< Parameter for callback */
132	enum rte_eth_event_type event;          /**< Interrupt event type */
133	uint32_t active;                        /**< Callback is executing */
134};
135
136enum {
137	STAT_QMAP_TX = 0,
138	STAT_QMAP_RX
139};
140
141enum {
142	DEV_DETACHED = 0,
143	DEV_ATTACHED
144};
145
146static void
147rte_eth_dev_data_alloc(void)
148{
149	const unsigned flags = 0;
150	const struct rte_memzone *mz;
151
152	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
153		mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
154				RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
155				rte_socket_id(), flags);
156	} else
157		mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
158	if (mz == NULL)
159		rte_panic("Cannot allocate memzone for ethernet port data\n");
160
161	rte_eth_dev_data = mz->addr;
162	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
163		memset(rte_eth_dev_data, 0,
164				RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
165}
166
167struct rte_eth_dev *
168rte_eth_dev_allocated(const char *name)
169{
170	unsigned i;
171
172	for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
173		if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
174		    strcmp(rte_eth_devices[i].data->name, name) == 0)
175			return &rte_eth_devices[i];
176	}
177	return NULL;
178}
179
180static uint8_t
181rte_eth_dev_find_free_port(void)
182{
183	unsigned i;
184
185	for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
186		if (rte_eth_devices[i].attached == DEV_DETACHED)
187			return i;
188	}
189	return RTE_MAX_ETHPORTS;
190}
191
192struct rte_eth_dev *
193rte_eth_dev_allocate(const char *name, enum rte_eth_dev_type type)
194{
195	uint8_t port_id;
196	struct rte_eth_dev *eth_dev;
197
198	port_id = rte_eth_dev_find_free_port();
199	if (port_id == RTE_MAX_ETHPORTS) {
200		RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
201		return NULL;
202	}
203
204	if (rte_eth_dev_data == NULL)
205		rte_eth_dev_data_alloc();
206
207	if (rte_eth_dev_allocated(name) != NULL) {
208		RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
209				name);
210		return NULL;
211	}
212
213	eth_dev = &rte_eth_devices[port_id];
214	eth_dev->data = &rte_eth_dev_data[port_id];
215	snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
216	eth_dev->data->port_id = port_id;
217	eth_dev->attached = DEV_ATTACHED;
218	eth_dev->dev_type = type;
219	nb_ports++;
220	return eth_dev;
221}
222
223static int
224rte_eth_dev_create_unique_device_name(char *name, size_t size,
225		struct rte_pci_device *pci_dev)
226{
227	int ret;
228
229	ret = snprintf(name, size, "%d:%d.%d",
230			pci_dev->addr.bus, pci_dev->addr.devid,
231			pci_dev->addr.function);
232	if (ret < 0)
233		return ret;
234	return 0;
235}
236
237int
238rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
239{
240	if (eth_dev == NULL)
241		return -EINVAL;
242
243	eth_dev->attached = DEV_DETACHED;
244	nb_ports--;
245	return 0;
246}
247
248static int
249rte_eth_dev_init(struct rte_pci_driver *pci_drv,
250		 struct rte_pci_device *pci_dev)
251{
252	struct eth_driver    *eth_drv;
253	struct rte_eth_dev *eth_dev;
254	char ethdev_name[RTE_ETH_NAME_MAX_LEN];
255
256	int diag;
257
258	eth_drv = (struct eth_driver *)pci_drv;
259
260	/* Create unique Ethernet device name using PCI address */
261	rte_eth_dev_create_unique_device_name(ethdev_name,
262			sizeof(ethdev_name), pci_dev);
263
264	eth_dev = rte_eth_dev_allocate(ethdev_name, RTE_ETH_DEV_PCI);
265	if (eth_dev == NULL)
266		return -ENOMEM;
267
268	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
269		eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
270				  eth_drv->dev_private_size,
271				  RTE_CACHE_LINE_SIZE);
272		if (eth_dev->data->dev_private == NULL)
273			rte_panic("Cannot allocate memzone for private port data\n");
274	}
275	eth_dev->pci_dev = pci_dev;
276	eth_dev->driver = eth_drv;
277	eth_dev->data->rx_mbuf_alloc_failed = 0;
278
279	/* init user callbacks */
280	TAILQ_INIT(&(eth_dev->link_intr_cbs));
281
282	/*
283	 * Set the default MTU.
284	 */
285	eth_dev->data->mtu = ETHER_MTU;
286
287	/* Invoke PMD device initialization function */
288	diag = (*eth_drv->eth_dev_init)(eth_dev);
289	if (diag == 0)
290		return 0;
291
292	RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%u device_id=0x%x) failed\n",
293			pci_drv->name,
294			(unsigned) pci_dev->id.vendor_id,
295			(unsigned) pci_dev->id.device_id);
296	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
297		rte_free(eth_dev->data->dev_private);
298	rte_eth_dev_release_port(eth_dev);
299	return diag;
300}
301
302static int
303rte_eth_dev_uninit(struct rte_pci_device *pci_dev)
304{
305	const struct eth_driver *eth_drv;
306	struct rte_eth_dev *eth_dev;
307	char ethdev_name[RTE_ETH_NAME_MAX_LEN];
308	int ret;
309
310	if (pci_dev == NULL)
311		return -EINVAL;
312
313	/* Create unique Ethernet device name using PCI address */
314	rte_eth_dev_create_unique_device_name(ethdev_name,
315			sizeof(ethdev_name), pci_dev);
316
317	eth_dev = rte_eth_dev_allocated(ethdev_name);
318	if (eth_dev == NULL)
319		return -ENODEV;
320
321	eth_drv = (const struct eth_driver *)pci_dev->driver;
322
323	/* Invoke PMD device uninit function */
324	if (*eth_drv->eth_dev_uninit) {
325		ret = (*eth_drv->eth_dev_uninit)(eth_dev);
326		if (ret)
327			return ret;
328	}
329
330	/* free ether device */
331	rte_eth_dev_release_port(eth_dev);
332
333	if (rte_eal_process_type() == RTE_PROC_PRIMARY)
334		rte_free(eth_dev->data->dev_private);
335
336	eth_dev->pci_dev = NULL;
337	eth_dev->driver = NULL;
338	eth_dev->data = NULL;
339
340	return 0;
341}
342
343/**
344 * Register an Ethernet [Poll Mode] driver.
345 *
346 * Function invoked by the initialization function of an Ethernet driver
347 * to simultaneously register itself as a PCI driver and as an Ethernet
348 * Poll Mode Driver.
349 * Invokes the rte_eal_pci_register() function to register the *pci_drv*
350 * structure embedded in the *eth_drv* structure, after having stored the
351 * address of the rte_eth_dev_init() function in the *devinit* field of
352 * the *pci_drv* structure.
353 * During the PCI probing phase, the rte_eth_dev_init() function is
354 * invoked for each PCI [Ethernet device] matching the embedded PCI
355 * identifiers provided by the driver.
356 */
357void
358rte_eth_driver_register(struct eth_driver *eth_drv)
359{
360	eth_drv->pci_drv.devinit = rte_eth_dev_init;
361	eth_drv->pci_drv.devuninit = rte_eth_dev_uninit;
362	rte_eal_pci_register(&eth_drv->pci_drv);
363}
364
365int
366rte_eth_dev_is_valid_port(uint8_t port_id)
367{
368	if (port_id >= RTE_MAX_ETHPORTS ||
369	    rte_eth_devices[port_id].attached != DEV_ATTACHED)
370		return 0;
371	else
372		return 1;
373}
374
375int
376rte_eth_dev_socket_id(uint8_t port_id)
377{
378	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
379	return rte_eth_devices[port_id].data->numa_node;
380}
381
382uint8_t
383rte_eth_dev_count(void)
384{
385	return nb_ports;
386}
387
388static enum rte_eth_dev_type
389rte_eth_dev_get_device_type(uint8_t port_id)
390{
391	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, RTE_ETH_DEV_UNKNOWN);
392	return rte_eth_devices[port_id].dev_type;
393}
394
395static int
396rte_eth_dev_get_addr_by_port(uint8_t port_id, struct rte_pci_addr *addr)
397{
398	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
399
400	if (addr == NULL) {
401		RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
402		return -EINVAL;
403	}
404
405	*addr = rte_eth_devices[port_id].pci_dev->addr;
406	return 0;
407}
408
409int
410rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
411{
412	char *tmp;
413
414	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
415
416	if (name == NULL) {
417		RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
418		return -EINVAL;
419	}
420
421	/* shouldn't check 'rte_eth_devices[i].data',
422	 * because it might be overwritten by VDEV PMD */
423	tmp = rte_eth_dev_data[port_id].name;
424	strcpy(name, tmp);
425	return 0;
426}
427
428int
429rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
430{
431	int i;
432
433	if (name == NULL) {
434		RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
435		return -EINVAL;
436	}
437
438	*port_id = RTE_MAX_ETHPORTS;
439
440	for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
441
442		if (!strncmp(name,
443			rte_eth_dev_data[i].name, strlen(name))) {
444
445			*port_id = i;
446
447			return 0;
448		}
449	}
450	return -ENODEV;
451}
452
453static int
454rte_eth_dev_get_port_by_addr(const struct rte_pci_addr *addr, uint8_t *port_id)
455{
456	int i;
457	struct rte_pci_device *pci_dev = NULL;
458
459	if (addr == NULL) {
460		RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
461		return -EINVAL;
462	}
463
464	*port_id = RTE_MAX_ETHPORTS;
465
466	for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
467
468		pci_dev = rte_eth_devices[i].pci_dev;
469
470		if (pci_dev &&
471			!rte_eal_compare_pci_addr(&pci_dev->addr, addr)) {
472
473			*port_id = i;
474
475			return 0;
476		}
477	}
478	return -ENODEV;
479}
480
481static int
482rte_eth_dev_is_detachable(uint8_t port_id)
483{
484	uint32_t dev_flags;
485
486	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
487
488	switch (rte_eth_devices[port_id].data->kdrv) {
489	case RTE_KDRV_IGB_UIO:
490	case RTE_KDRV_UIO_GENERIC:
491	case RTE_KDRV_NIC_UIO:
492	case RTE_KDRV_NONE:
493		break;
494	case RTE_KDRV_VFIO:
495	default:
496		return -ENOTSUP;
497	}
498	dev_flags = rte_eth_devices[port_id].data->dev_flags;
499	if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
500		(!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
501		return 0;
502	else
503		return 1;
504}
505
506/* attach the new physical device, then store port_id of the device */
507static int
508rte_eth_dev_attach_pdev(struct rte_pci_addr *addr, uint8_t *port_id)
509{
510	/* re-construct pci_device_list */
511	if (rte_eal_pci_scan())
512		goto err;
513	/* Invoke probe func of the driver can handle the new device. */
514	if (rte_eal_pci_probe_one(addr))
515		goto err;
516
517	if (rte_eth_dev_get_port_by_addr(addr, port_id))
518		goto err;
519
520	return 0;
521err:
522	return -1;
523}
524
525/* detach the new physical device, then store pci_addr of the device */
526static int
527rte_eth_dev_detach_pdev(uint8_t port_id, struct rte_pci_addr *addr)
528{
529	struct rte_pci_addr freed_addr;
530	struct rte_pci_addr vp;
531
532	/* get pci address by port id */
533	if (rte_eth_dev_get_addr_by_port(port_id, &freed_addr))
534		goto err;
535
536	/* Zeroed pci addr means the port comes from virtual device */
537	vp.domain = vp.bus = vp.devid = vp.function = 0;
538	if (rte_eal_compare_pci_addr(&vp, &freed_addr) == 0)
539		goto err;
540
541	/* invoke devuninit func of the pci driver,
542	 * also remove the device from pci_device_list */
543	if (rte_eal_pci_detach(&freed_addr))
544		goto err;
545
546	*addr = freed_addr;
547	return 0;
548err:
549	return -1;
550}
551
552/* attach the new virtual device, then store port_id of the device */
553static int
554rte_eth_dev_attach_vdev(const char *vdevargs, uint8_t *port_id)
555{
556	char *name = NULL, *args = NULL;
557	int ret = -1;
558
559	/* parse vdevargs, then retrieve device name and args */
560	if (rte_eal_parse_devargs_str(vdevargs, &name, &args))
561		goto end;
562
563	/* walk around dev_driver_list to find the driver of the device,
564	 * then invoke probe function of the driver.
565	 * rte_eal_vdev_init() updates port_id allocated after
566	 * initialization.
567	 */
568	if (rte_eal_vdev_init(name, args))
569		goto end;
570
571	if (rte_eth_dev_get_port_by_name(name, port_id))
572		goto end;
573
574	ret = 0;
575end:
576	free(name);
577	free(args);
578
579	return ret;
580}
581
582/* detach the new virtual device, then store the name of the device */
583static int
584rte_eth_dev_detach_vdev(uint8_t port_id, char *vdevname)
585{
586	char name[RTE_ETH_NAME_MAX_LEN];
587
588	/* get device name by port id */
589	if (rte_eth_dev_get_name_by_port(port_id, name))
590		goto err;
591	/* walk around dev_driver_list to find the driver of the device,
592	 * then invoke uninit function of the driver */
593	if (rte_eal_vdev_uninit(name))
594		goto err;
595
596	strncpy(vdevname, name, sizeof(name));
597	return 0;
598err:
599	return -1;
600}
601
602/* attach the new device, then store port_id of the device */
603int
604rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
605{
606	struct rte_pci_addr addr;
607	int ret = -1;
608
609	if ((devargs == NULL) || (port_id == NULL)) {
610		ret = -EINVAL;
611		goto err;
612	}
613
614	if (eal_parse_pci_DomBDF(devargs, &addr) == 0) {
615		ret = rte_eth_dev_attach_pdev(&addr, port_id);
616		if (ret < 0)
617			goto err;
618	} else {
619		ret = rte_eth_dev_attach_vdev(devargs, port_id);
620		if (ret < 0)
621			goto err;
622	}
623
624	return 0;
625err:
626	RTE_LOG(ERR, EAL, "Driver, cannot attach the device\n");
627	return ret;
628}
629
630/* detach the device, then store the name of the device */
631int
632rte_eth_dev_detach(uint8_t port_id, char *name)
633{
634	struct rte_pci_addr addr;
635	int ret = -1;
636
637	if (name == NULL) {
638		ret = -EINVAL;
639		goto err;
640	}
641
642	/* check whether the driver supports detach feature, or not */
643	if (rte_eth_dev_is_detachable(port_id))
644		goto err;
645
646	if (rte_eth_dev_get_device_type(port_id) == RTE_ETH_DEV_PCI) {
647		ret = rte_eth_dev_get_addr_by_port(port_id, &addr);
648		if (ret < 0)
649			goto err;
650
651		ret = rte_eth_dev_detach_pdev(port_id, &addr);
652		if (ret < 0)
653			goto err;
654
655		snprintf(name, RTE_ETH_NAME_MAX_LEN,
656			"%04x:%02x:%02x.%d",
657			addr.domain, addr.bus,
658			addr.devid, addr.function);
659	} else {
660		ret = rte_eth_dev_detach_vdev(port_id, name);
661		if (ret < 0)
662			goto err;
663	}
664
665	return 0;
666
667err:
668	RTE_LOG(ERR, EAL, "Driver, cannot detach the device\n");
669	return ret;
670}
671
672static int
673rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
674{
675	uint16_t old_nb_queues = dev->data->nb_rx_queues;
676	void **rxq;
677	unsigned i;
678
679	if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
680		dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
681				sizeof(dev->data->rx_queues[0]) * nb_queues,
682				RTE_CACHE_LINE_SIZE);
683		if (dev->data->rx_queues == NULL) {
684			dev->data->nb_rx_queues = 0;
685			return -(ENOMEM);
686		}
687	} else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
688		RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
689
690		rxq = dev->data->rx_queues;
691
692		for (i = nb_queues; i < old_nb_queues; i++)
693			(*dev->dev_ops->rx_queue_release)(rxq[i]);
694		rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
695				RTE_CACHE_LINE_SIZE);
696		if (rxq == NULL)
697			return -(ENOMEM);
698		if (nb_queues > old_nb_queues) {
699			uint16_t new_qs = nb_queues - old_nb_queues;
700
701			memset(rxq + old_nb_queues, 0,
702				sizeof(rxq[0]) * new_qs);
703		}
704
705		dev->data->rx_queues = rxq;
706
707	} else if (dev->data->rx_queues != NULL && nb_queues == 0) {
708		RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
709
710		rxq = dev->data->rx_queues;
711
712		for (i = nb_queues; i < old_nb_queues; i++)
713			(*dev->dev_ops->rx_queue_release)(rxq[i]);
714	}
715	dev->data->nb_rx_queues = nb_queues;
716	return 0;
717}
718
719int
720rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
721{
722	struct rte_eth_dev *dev;
723
724	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
725
726	dev = &rte_eth_devices[port_id];
727	if (rx_queue_id >= dev->data->nb_rx_queues) {
728		RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
729		return -EINVAL;
730	}
731
732	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
733
734	if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
735		RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
736			" already started\n",
737			rx_queue_id, port_id);
738		return 0;
739	}
740
741	return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
742
743}
744
745int
746rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
747{
748	struct rte_eth_dev *dev;
749
750	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
751
752	dev = &rte_eth_devices[port_id];
753	if (rx_queue_id >= dev->data->nb_rx_queues) {
754		RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
755		return -EINVAL;
756	}
757
758	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
759
760	if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
761		RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
762			" already stopped\n",
763			rx_queue_id, port_id);
764		return 0;
765	}
766
767	return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
768
769}
770
771int
772rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
773{
774	struct rte_eth_dev *dev;
775
776	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
777
778	dev = &rte_eth_devices[port_id];
779	if (tx_queue_id >= dev->data->nb_tx_queues) {
780		RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
781		return -EINVAL;
782	}
783
784	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
785
786	if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
787		RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
788			" already started\n",
789			tx_queue_id, port_id);
790		return 0;
791	}
792
793	return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
794
795}
796
797int
798rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
799{
800	struct rte_eth_dev *dev;
801
802	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
803
804	dev = &rte_eth_devices[port_id];
805	if (tx_queue_id >= dev->data->nb_tx_queues) {
806		RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
807		return -EINVAL;
808	}
809
810	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
811
812	if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
813		RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
814			" already stopped\n",
815			tx_queue_id, port_id);
816		return 0;
817	}
818
819	return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
820
821}
822
823static int
824rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
825{
826	uint16_t old_nb_queues = dev->data->nb_tx_queues;
827	void **txq;
828	unsigned i;
829
830	if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
831		dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
832						   sizeof(dev->data->tx_queues[0]) * nb_queues,
833						   RTE_CACHE_LINE_SIZE);
834		if (dev->data->tx_queues == NULL) {
835			dev->data->nb_tx_queues = 0;
836			return -(ENOMEM);
837		}
838	} else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
839		RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
840
841		txq = dev->data->tx_queues;
842
843		for (i = nb_queues; i < old_nb_queues; i++)
844			(*dev->dev_ops->tx_queue_release)(txq[i]);
845		txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
846				  RTE_CACHE_LINE_SIZE);
847		if (txq == NULL)
848			return -ENOMEM;
849		if (nb_queues > old_nb_queues) {
850			uint16_t new_qs = nb_queues - old_nb_queues;
851
852			memset(txq + old_nb_queues, 0,
853			       sizeof(txq[0]) * new_qs);
854		}
855
856		dev->data->tx_queues = txq;
857
858	} else if (dev->data->tx_queues != NULL && nb_queues == 0) {
859		RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
860
861		txq = dev->data->tx_queues;
862
863		for (i = nb_queues; i < old_nb_queues; i++)
864			(*dev->dev_ops->tx_queue_release)(txq[i]);
865	}
866	dev->data->nb_tx_queues = nb_queues;
867	return 0;
868}
869
870uint32_t
871rte_eth_speed_bitflag(uint32_t speed, int duplex)
872{
873	switch (speed) {
874	case ETH_SPEED_NUM_10M:
875		return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
876	case ETH_SPEED_NUM_100M:
877		return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
878	case ETH_SPEED_NUM_1G:
879		return ETH_LINK_SPEED_1G;
880	case ETH_SPEED_NUM_2_5G:
881		return ETH_LINK_SPEED_2_5G;
882	case ETH_SPEED_NUM_5G:
883		return ETH_LINK_SPEED_5G;
884	case ETH_SPEED_NUM_10G:
885		return ETH_LINK_SPEED_10G;
886	case ETH_SPEED_NUM_20G:
887		return ETH_LINK_SPEED_20G;
888	case ETH_SPEED_NUM_25G:
889		return ETH_LINK_SPEED_25G;
890	case ETH_SPEED_NUM_40G:
891		return ETH_LINK_SPEED_40G;
892	case ETH_SPEED_NUM_50G:
893		return ETH_LINK_SPEED_50G;
894	case ETH_SPEED_NUM_56G:
895		return ETH_LINK_SPEED_56G;
896	case ETH_SPEED_NUM_100G:
897		return ETH_LINK_SPEED_100G;
898	default:
899		return 0;
900	}
901}
902
903int
904rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
905		      const struct rte_eth_conf *dev_conf)
906{
907	struct rte_eth_dev *dev;
908	struct rte_eth_dev_info dev_info;
909	int diag;
910
911	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
912
913	if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
914		RTE_PMD_DEBUG_TRACE(
915			"Number of RX queues requested (%u) is greater than max supported(%d)\n",
916			nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
917		return -EINVAL;
918	}
919
920	if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
921		RTE_PMD_DEBUG_TRACE(
922			"Number of TX queues requested (%u) is greater than max supported(%d)\n",
923			nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
924		return -EINVAL;
925	}
926
927	dev = &rte_eth_devices[port_id];
928
929	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
930	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
931
932	if (dev->data->dev_started) {
933		RTE_PMD_DEBUG_TRACE(
934		    "port %d must be stopped to allow configuration\n", port_id);
935		return -EBUSY;
936	}
937
938	/* Copy the dev_conf parameter into the dev structure */
939	memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
940
941	/*
942	 * Check that the numbers of RX and TX queues are not greater
943	 * than the maximum number of RX and TX queues supported by the
944	 * configured device.
945	 */
946	(*dev->dev_ops->dev_infos_get)(dev, &dev_info);
947
948	if (nb_rx_q == 0 && nb_tx_q == 0) {
949		RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
950		return -EINVAL;
951	}
952
953	if (nb_rx_q > dev_info.max_rx_queues) {
954		RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
955				port_id, nb_rx_q, dev_info.max_rx_queues);
956		return -EINVAL;
957	}
958
959	if (nb_tx_q > dev_info.max_tx_queues) {
960		RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
961				port_id, nb_tx_q, dev_info.max_tx_queues);
962		return -EINVAL;
963	}
964
965	/*
966	 * If link state interrupt is enabled, check that the
967	 * device supports it.
968	 */
969	if ((dev_conf->intr_conf.lsc == 1) &&
970		(!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
971			RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
972					dev->data->drv_name);
973			return -EINVAL;
974	}
975
976	/*
977	 * If jumbo frames are enabled, check that the maximum RX packet
978	 * length is supported by the configured device.
979	 */
980	if (dev_conf->rxmode.jumbo_frame == 1) {
981		if (dev_conf->rxmode.max_rx_pkt_len >
982		    dev_info.max_rx_pktlen) {
983			RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
984				" > max valid value %u\n",
985				port_id,
986				(unsigned)dev_conf->rxmode.max_rx_pkt_len,
987				(unsigned)dev_info.max_rx_pktlen);
988			return -EINVAL;
989		} else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
990			RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
991				" < min valid value %u\n",
992				port_id,
993				(unsigned)dev_conf->rxmode.max_rx_pkt_len,
994				(unsigned)ETHER_MIN_LEN);
995			return -EINVAL;
996		}
997	} else {
998		if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
999			dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1000			/* Use default value */
1001			dev->data->dev_conf.rxmode.max_rx_pkt_len =
1002							ETHER_MAX_LEN;
1003	}
1004
1005	/*
1006	 * Setup new number of RX/TX queues and reconfigure device.
1007	 */
1008	diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1009	if (diag != 0) {
1010		RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1011				port_id, diag);
1012		return diag;
1013	}
1014
1015	diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1016	if (diag != 0) {
1017		RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1018				port_id, diag);
1019		rte_eth_dev_rx_queue_config(dev, 0);
1020		return diag;
1021	}
1022
1023	diag = (*dev->dev_ops->dev_configure)(dev);
1024	if (diag != 0) {
1025		RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1026				port_id, diag);
1027		rte_eth_dev_rx_queue_config(dev, 0);
1028		rte_eth_dev_tx_queue_config(dev, 0);
1029		return diag;
1030	}
1031
1032	return 0;
1033}
1034
1035static void
1036rte_eth_dev_config_restore(uint8_t port_id)
1037{
1038	struct rte_eth_dev *dev;
1039	struct rte_eth_dev_info dev_info;
1040	struct ether_addr addr;
1041	uint16_t i;
1042	uint32_t pool = 0;
1043
1044	dev = &rte_eth_devices[port_id];
1045
1046	rte_eth_dev_info_get(port_id, &dev_info);
1047
1048	if (RTE_ETH_DEV_SRIOV(dev).active)
1049		pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
1050
1051	/* replay MAC address configuration */
1052	for (i = 0; i < dev_info.max_mac_addrs; i++) {
1053		addr = dev->data->mac_addrs[i];
1054
1055		/* skip zero address */
1056		if (is_zero_ether_addr(&addr))
1057			continue;
1058
1059		/* add address to the hardware */
1060		if  (*dev->dev_ops->mac_addr_add &&
1061			(dev->data->mac_pool_sel[i] & (1ULL << pool)))
1062			(*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
1063		else {
1064			RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
1065					port_id);
1066			/* exit the loop but not return an error */
1067			break;
1068		}
1069	}
1070
1071	/* replay promiscuous configuration */
1072	if (rte_eth_promiscuous_get(port_id) == 1)
1073		rte_eth_promiscuous_enable(port_id);
1074	else if (rte_eth_promiscuous_get(port_id) == 0)
1075		rte_eth_promiscuous_disable(port_id);
1076
1077	/* replay all multicast configuration */
1078	if (rte_eth_allmulticast_get(port_id) == 1)
1079		rte_eth_allmulticast_enable(port_id);
1080	else if (rte_eth_allmulticast_get(port_id) == 0)
1081		rte_eth_allmulticast_disable(port_id);
1082}
1083
1084int
1085rte_eth_dev_start(uint8_t port_id)
1086{
1087	struct rte_eth_dev *dev;
1088	int diag;
1089
1090	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1091
1092	dev = &rte_eth_devices[port_id];
1093
1094	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1095
1096	if (dev->data->dev_started != 0) {
1097		RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1098			" already started\n",
1099			port_id);
1100		return 0;
1101	}
1102
1103	diag = (*dev->dev_ops->dev_start)(dev);
1104	if (diag == 0)
1105		dev->data->dev_started = 1;
1106	else
1107		return diag;
1108
1109	rte_eth_dev_config_restore(port_id);
1110
1111	if (dev->data->dev_conf.intr_conf.lsc == 0) {
1112		RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1113		(*dev->dev_ops->link_update)(dev, 0);
1114	}
1115	return 0;
1116}
1117
1118void
1119rte_eth_dev_stop(uint8_t port_id)
1120{
1121	struct rte_eth_dev *dev;
1122
1123	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1124	dev = &rte_eth_devices[port_id];
1125
1126	RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1127
1128	if (dev->data->dev_started == 0) {
1129		RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1130			" already stopped\n",
1131			port_id);
1132		return;
1133	}
1134
1135	dev->data->dev_started = 0;
1136	(*dev->dev_ops->dev_stop)(dev);
1137}
1138
1139int
1140rte_eth_dev_set_link_up(uint8_t port_id)
1141{
1142	struct rte_eth_dev *dev;
1143
1144	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1145
1146	dev = &rte_eth_devices[port_id];
1147
1148	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1149	return (*dev->dev_ops->dev_set_link_up)(dev);
1150}
1151
1152int
1153rte_eth_dev_set_link_down(uint8_t port_id)
1154{
1155	struct rte_eth_dev *dev;
1156
1157	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1158
1159	dev = &rte_eth_devices[port_id];
1160
1161	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1162	return (*dev->dev_ops->dev_set_link_down)(dev);
1163}
1164
1165void
1166rte_eth_dev_close(uint8_t port_id)
1167{
1168	struct rte_eth_dev *dev;
1169
1170	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1171	dev = &rte_eth_devices[port_id];
1172
1173	RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1174	dev->data->dev_started = 0;
1175	(*dev->dev_ops->dev_close)(dev);
1176
1177	rte_free(dev->data->rx_queues);
1178	dev->data->rx_queues = NULL;
1179	rte_free(dev->data->tx_queues);
1180	dev->data->tx_queues = NULL;
1181}
1182
1183int
1184rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1185		       uint16_t nb_rx_desc, unsigned int socket_id,
1186		       const struct rte_eth_rxconf *rx_conf,
1187		       struct rte_mempool *mp)
1188{
1189	int ret;
1190	uint32_t mbp_buf_size;
1191	struct rte_eth_dev *dev;
1192	struct rte_eth_dev_info dev_info;
1193
1194	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1195
1196	dev = &rte_eth_devices[port_id];
1197	if (rx_queue_id >= dev->data->nb_rx_queues) {
1198		RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1199		return -EINVAL;
1200	}
1201
1202	if (dev->data->dev_started) {
1203		RTE_PMD_DEBUG_TRACE(
1204		    "port %d must be stopped to allow configuration\n", port_id);
1205		return -EBUSY;
1206	}
1207
1208	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1209	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1210
1211	/*
1212	 * Check the size of the mbuf data buffer.
1213	 * This value must be provided in the private data of the memory pool.
1214	 * First check that the memory pool has a valid private data.
1215	 */
1216	rte_eth_dev_info_get(port_id, &dev_info);
1217	if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1218		RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1219				mp->name, (int) mp->private_data_size,
1220				(int) sizeof(struct rte_pktmbuf_pool_private));
1221		return -ENOSPC;
1222	}
1223	mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1224
1225	if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1226		RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1227				"(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1228				"=%d)\n",
1229				mp->name,
1230				(int)mbp_buf_size,
1231				(int)(RTE_PKTMBUF_HEADROOM +
1232				      dev_info.min_rx_bufsize),
1233				(int)RTE_PKTMBUF_HEADROOM,
1234				(int)dev_info.min_rx_bufsize);
1235		return -EINVAL;
1236	}
1237
1238	if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1239			nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1240			nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1241
1242		RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1243			"should be: <= %hu, = %hu, and a product of %hu\n",
1244			nb_rx_desc,
1245			dev_info.rx_desc_lim.nb_max,
1246			dev_info.rx_desc_lim.nb_min,
1247			dev_info.rx_desc_lim.nb_align);
1248		return -EINVAL;
1249	}
1250
1251	if (rx_conf == NULL)
1252		rx_conf = &dev_info.default_rxconf;
1253
1254	ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1255					      socket_id, rx_conf, mp);
1256	if (!ret) {
1257		if (!dev->data->min_rx_buf_size ||
1258		    dev->data->min_rx_buf_size > mbp_buf_size)
1259			dev->data->min_rx_buf_size = mbp_buf_size;
1260	}
1261
1262	return ret;
1263}
1264
1265int
1266rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1267		       uint16_t nb_tx_desc, unsigned int socket_id,
1268		       const struct rte_eth_txconf *tx_conf)
1269{
1270	struct rte_eth_dev *dev;
1271	struct rte_eth_dev_info dev_info;
1272
1273	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1274
1275	dev = &rte_eth_devices[port_id];
1276	if (tx_queue_id >= dev->data->nb_tx_queues) {
1277		RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1278		return -EINVAL;
1279	}
1280
1281	if (dev->data->dev_started) {
1282		RTE_PMD_DEBUG_TRACE(
1283		    "port %d must be stopped to allow configuration\n", port_id);
1284		return -EBUSY;
1285	}
1286
1287	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1288	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1289
1290	rte_eth_dev_info_get(port_id, &dev_info);
1291
1292	if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1293	    nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1294	    nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1295		RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1296				"should be: <= %hu, = %hu, and a product of %hu\n",
1297				nb_tx_desc,
1298				dev_info.tx_desc_lim.nb_max,
1299				dev_info.tx_desc_lim.nb_min,
1300				dev_info.tx_desc_lim.nb_align);
1301		return -EINVAL;
1302	}
1303
1304	if (tx_conf == NULL)
1305		tx_conf = &dev_info.default_txconf;
1306
1307	return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1308					       socket_id, tx_conf);
1309}
1310
1311void
1312rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1313		void *userdata __rte_unused)
1314{
1315	unsigned i;
1316
1317	for (i = 0; i < unsent; i++)
1318		rte_pktmbuf_free(pkts[i]);
1319}
1320
1321void
1322rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1323		void *userdata)
1324{
1325	uint64_t *count = userdata;
1326	unsigned i;
1327
1328	for (i = 0; i < unsent; i++)
1329		rte_pktmbuf_free(pkts[i]);
1330
1331	*count += unsent;
1332}
1333
1334int
1335rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1336		buffer_tx_error_fn cbfn, void *userdata)
1337{
1338	buffer->error_callback = cbfn;
1339	buffer->error_userdata = userdata;
1340	return 0;
1341}
1342
1343int
1344rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1345{
1346	int ret = 0;
1347
1348	if (buffer == NULL)
1349		return -EINVAL;
1350
1351	buffer->size = size;
1352	if (buffer->error_callback == NULL) {
1353		ret = rte_eth_tx_buffer_set_err_callback(
1354			buffer, rte_eth_tx_buffer_drop_callback, NULL);
1355	}
1356
1357	return ret;
1358}
1359
1360void
1361rte_eth_promiscuous_enable(uint8_t port_id)
1362{
1363	struct rte_eth_dev *dev;
1364
1365	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1366	dev = &rte_eth_devices[port_id];
1367
1368	RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1369	(*dev->dev_ops->promiscuous_enable)(dev);
1370	dev->data->promiscuous = 1;
1371}
1372
1373void
1374rte_eth_promiscuous_disable(uint8_t port_id)
1375{
1376	struct rte_eth_dev *dev;
1377
1378	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1379	dev = &rte_eth_devices[port_id];
1380
1381	RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1382	dev->data->promiscuous = 0;
1383	(*dev->dev_ops->promiscuous_disable)(dev);
1384}
1385
1386int
1387rte_eth_promiscuous_get(uint8_t port_id)
1388{
1389	struct rte_eth_dev *dev;
1390
1391	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1392
1393	dev = &rte_eth_devices[port_id];
1394	return dev->data->promiscuous;
1395}
1396
1397void
1398rte_eth_allmulticast_enable(uint8_t port_id)
1399{
1400	struct rte_eth_dev *dev;
1401
1402	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1403	dev = &rte_eth_devices[port_id];
1404
1405	RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1406	(*dev->dev_ops->allmulticast_enable)(dev);
1407	dev->data->all_multicast = 1;
1408}
1409
1410void
1411rte_eth_allmulticast_disable(uint8_t port_id)
1412{
1413	struct rte_eth_dev *dev;
1414
1415	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1416	dev = &rte_eth_devices[port_id];
1417
1418	RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1419	dev->data->all_multicast = 0;
1420	(*dev->dev_ops->allmulticast_disable)(dev);
1421}
1422
1423int
1424rte_eth_allmulticast_get(uint8_t port_id)
1425{
1426	struct rte_eth_dev *dev;
1427
1428	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1429
1430	dev = &rte_eth_devices[port_id];
1431	return dev->data->all_multicast;
1432}
1433
1434static inline int
1435rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1436				struct rte_eth_link *link)
1437{
1438	struct rte_eth_link *dst = link;
1439	struct rte_eth_link *src = &(dev->data->dev_link);
1440
1441	if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1442					*(uint64_t *)src) == 0)
1443		return -1;
1444
1445	return 0;
1446}
1447
1448void
1449rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1450{
1451	struct rte_eth_dev *dev;
1452
1453	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1454	dev = &rte_eth_devices[port_id];
1455
1456	if (dev->data->dev_conf.intr_conf.lsc != 0)
1457		rte_eth_dev_atomic_read_link_status(dev, eth_link);
1458	else {
1459		RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1460		(*dev->dev_ops->link_update)(dev, 1);
1461		*eth_link = dev->data->dev_link;
1462	}
1463}
1464
1465void
1466rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1467{
1468	struct rte_eth_dev *dev;
1469
1470	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1471	dev = &rte_eth_devices[port_id];
1472
1473	if (dev->data->dev_conf.intr_conf.lsc != 0)
1474		rte_eth_dev_atomic_read_link_status(dev, eth_link);
1475	else {
1476		RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1477		(*dev->dev_ops->link_update)(dev, 0);
1478		*eth_link = dev->data->dev_link;
1479	}
1480}
1481
1482int
1483rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1484{
1485	struct rte_eth_dev *dev;
1486
1487	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1488
1489	dev = &rte_eth_devices[port_id];
1490	memset(stats, 0, sizeof(*stats));
1491
1492	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1493	(*dev->dev_ops->stats_get)(dev, stats);
1494	stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1495	return 0;
1496}
1497
1498void
1499rte_eth_stats_reset(uint8_t port_id)
1500{
1501	struct rte_eth_dev *dev;
1502
1503	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1504	dev = &rte_eth_devices[port_id];
1505
1506	RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1507	(*dev->dev_ops->stats_reset)(dev);
1508	dev->data->rx_mbuf_alloc_failed = 0;
1509}
1510
1511static int
1512get_xstats_count(uint8_t port_id)
1513{
1514	struct rte_eth_dev *dev;
1515	int count;
1516
1517	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1518	dev = &rte_eth_devices[port_id];
1519	if (dev->dev_ops->xstats_get_names != NULL) {
1520		count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1521		if (count < 0)
1522			return count;
1523	} else
1524		count = 0;
1525	count += RTE_NB_STATS;
1526	count += dev->data->nb_rx_queues * RTE_NB_RXQ_STATS;
1527	count += dev->data->nb_tx_queues * RTE_NB_TXQ_STATS;
1528	return count;
1529}
1530
1531int
1532rte_eth_xstats_get_names(uint8_t port_id,
1533	struct rte_eth_xstat_name *xstats_names,
1534	unsigned size)
1535{
1536	struct rte_eth_dev *dev;
1537	int cnt_used_entries;
1538	int cnt_expected_entries;
1539	int cnt_driver_entries;
1540	uint32_t idx, id_queue;
1541
1542	cnt_expected_entries = get_xstats_count(port_id);
1543	if (xstats_names == NULL || cnt_expected_entries < 0 ||
1544			(int)size < cnt_expected_entries)
1545		return cnt_expected_entries;
1546
1547	/* port_id checked in get_xstats_count() */
1548	dev = &rte_eth_devices[port_id];
1549	cnt_used_entries = 0;
1550
1551	for (idx = 0; idx < RTE_NB_STATS; idx++) {
1552		snprintf(xstats_names[cnt_used_entries].name,
1553			sizeof(xstats_names[0].name),
1554			"%s", rte_stats_strings[idx].name);
1555		cnt_used_entries++;
1556	}
1557	for (id_queue = 0; id_queue < dev->data->nb_rx_queues; id_queue++) {
1558		for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1559			snprintf(xstats_names[cnt_used_entries].name,
1560				sizeof(xstats_names[0].name),
1561				"rx_q%u%s",
1562				id_queue, rte_rxq_stats_strings[idx].name);
1563			cnt_used_entries++;
1564		}
1565
1566	}
1567	for (id_queue = 0; id_queue < dev->data->nb_tx_queues; id_queue++) {
1568		for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1569			snprintf(xstats_names[cnt_used_entries].name,
1570				sizeof(xstats_names[0].name),
1571				"tx_q%u%s",
1572				id_queue, rte_txq_stats_strings[idx].name);
1573			cnt_used_entries++;
1574		}
1575	}
1576
1577	if (dev->dev_ops->xstats_get_names != NULL) {
1578		/* If there are any driver-specific xstats, append them
1579		 * to end of list.
1580		 */
1581		cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1582			dev,
1583			xstats_names + cnt_used_entries,
1584			size - cnt_used_entries);
1585		if (cnt_driver_entries < 0)
1586			return cnt_driver_entries;
1587		cnt_used_entries += cnt_driver_entries;
1588	}
1589
1590	return cnt_used_entries;
1591}
1592
1593/* retrieve ethdev extended statistics */
1594int
1595rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1596	unsigned n)
1597{
1598	struct rte_eth_stats eth_stats;
1599	struct rte_eth_dev *dev;
1600	unsigned count = 0, i, q;
1601	signed xcount = 0;
1602	uint64_t val, *stats_ptr;
1603
1604	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1605
1606	dev = &rte_eth_devices[port_id];
1607
1608	/* Return generic statistics */
1609	count = RTE_NB_STATS + (dev->data->nb_rx_queues * RTE_NB_RXQ_STATS) +
1610		(dev->data->nb_tx_queues * RTE_NB_TXQ_STATS);
1611
1612	/* implemented by the driver */
1613	if (dev->dev_ops->xstats_get != NULL) {
1614		/* Retrieve the xstats from the driver at the end of the
1615		 * xstats struct.
1616		 */
1617		xcount = (*dev->dev_ops->xstats_get)(dev,
1618				     xstats ? xstats + count : NULL,
1619				     (n > count) ? n - count : 0);
1620
1621		if (xcount < 0)
1622			return xcount;
1623	}
1624
1625	if (n < count + xcount || xstats == NULL)
1626		return count + xcount;
1627
1628	/* now fill the xstats structure */
1629	count = 0;
1630	rte_eth_stats_get(port_id, &eth_stats);
1631
1632	/* global stats */
1633	for (i = 0; i < RTE_NB_STATS; i++) {
1634		stats_ptr = RTE_PTR_ADD(&eth_stats,
1635					rte_stats_strings[i].offset);
1636		val = *stats_ptr;
1637		xstats[count++].value = val;
1638	}
1639
1640	/* per-rxq stats */
1641	for (q = 0; q < dev->data->nb_rx_queues; q++) {
1642		for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1643			stats_ptr = RTE_PTR_ADD(&eth_stats,
1644					rte_rxq_stats_strings[i].offset +
1645					q * sizeof(uint64_t));
1646			val = *stats_ptr;
1647			xstats[count++].value = val;
1648		}
1649	}
1650
1651	/* per-txq stats */
1652	for (q = 0; q < dev->data->nb_tx_queues; q++) {
1653		for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1654			stats_ptr = RTE_PTR_ADD(&eth_stats,
1655					rte_txq_stats_strings[i].offset +
1656					q * sizeof(uint64_t));
1657			val = *stats_ptr;
1658			xstats[count++].value = val;
1659		}
1660	}
1661
1662	for (i = 0; i < count + xcount; i++)
1663		xstats[i].id = i;
1664
1665	return count + xcount;
1666}
1667
1668/* reset ethdev extended statistics */
1669void
1670rte_eth_xstats_reset(uint8_t port_id)
1671{
1672	struct rte_eth_dev *dev;
1673
1674	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1675	dev = &rte_eth_devices[port_id];
1676
1677	/* implemented by the driver */
1678	if (dev->dev_ops->xstats_reset != NULL) {
1679		(*dev->dev_ops->xstats_reset)(dev);
1680		return;
1681	}
1682
1683	/* fallback to default */
1684	rte_eth_stats_reset(port_id);
1685}
1686
1687static int
1688set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1689		uint8_t is_rx)
1690{
1691	struct rte_eth_dev *dev;
1692
1693	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1694
1695	dev = &rte_eth_devices[port_id];
1696
1697	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1698	return (*dev->dev_ops->queue_stats_mapping_set)
1699			(dev, queue_id, stat_idx, is_rx);
1700}
1701
1702
1703int
1704rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1705		uint8_t stat_idx)
1706{
1707	return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1708			STAT_QMAP_TX);
1709}
1710
1711
1712int
1713rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1714		uint8_t stat_idx)
1715{
1716	return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1717			STAT_QMAP_RX);
1718}
1719
1720void
1721rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1722{
1723	struct rte_eth_dev *dev;
1724	const struct rte_eth_desc_lim lim = {
1725		.nb_max = UINT16_MAX,
1726		.nb_min = 0,
1727		.nb_align = 1,
1728	};
1729
1730	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1731	dev = &rte_eth_devices[port_id];
1732
1733	memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1734	dev_info->rx_desc_lim = lim;
1735	dev_info->tx_desc_lim = lim;
1736
1737	RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1738	(*dev->dev_ops->dev_infos_get)(dev, dev_info);
1739	dev_info->pci_dev = dev->pci_dev;
1740	dev_info->driver_name = dev->data->drv_name;
1741	dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1742	dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1743}
1744
1745int
1746rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1747				 uint32_t *ptypes, int num)
1748{
1749	int i, j;
1750	struct rte_eth_dev *dev;
1751	const uint32_t *all_ptypes;
1752
1753	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1754	dev = &rte_eth_devices[port_id];
1755	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1756	all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1757
1758	if (!all_ptypes)
1759		return 0;
1760
1761	for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1762		if (all_ptypes[i] & ptype_mask) {
1763			if (j < num)
1764				ptypes[j] = all_ptypes[i];
1765			j++;
1766		}
1767
1768	return j;
1769}
1770
1771void
1772rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1773{
1774	struct rte_eth_dev *dev;
1775
1776	RTE_ETH_VALID_PORTID_OR_RET(port_id);
1777	dev = &rte_eth_devices[port_id];
1778	ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1779}
1780
1781
1782int
1783rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1784{
1785	struct rte_eth_dev *dev;
1786
1787	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1788
1789	dev = &rte_eth_devices[port_id];
1790	*mtu = dev->data->mtu;
1791	return 0;
1792}
1793
1794int
1795rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1796{
1797	int ret;
1798	struct rte_eth_dev *dev;
1799
1800	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1801	dev = &rte_eth_devices[port_id];
1802	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1803
1804	ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1805	if (!ret)
1806		dev->data->mtu = mtu;
1807
1808	return ret;
1809}
1810
1811int
1812rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1813{
1814	struct rte_eth_dev *dev;
1815
1816	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1817	dev = &rte_eth_devices[port_id];
1818	if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1819		RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1820		return -ENOSYS;
1821	}
1822
1823	if (vlan_id > 4095) {
1824		RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1825				port_id, (unsigned) vlan_id);
1826		return -EINVAL;
1827	}
1828	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1829
1830	return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1831}
1832
1833int
1834rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1835{
1836	struct rte_eth_dev *dev;
1837
1838	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1839	dev = &rte_eth_devices[port_id];
1840	if (rx_queue_id >= dev->data->nb_rx_queues) {
1841		RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1842		return -EINVAL;
1843	}
1844
1845	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1846	(*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1847
1848	return 0;
1849}
1850
1851int
1852rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1853				enum rte_vlan_type vlan_type,
1854				uint16_t tpid)
1855{
1856	struct rte_eth_dev *dev;
1857
1858	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1859	dev = &rte_eth_devices[port_id];
1860	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1861
1862	return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1863}
1864
1865int
1866rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1867{
1868	struct rte_eth_dev *dev;
1869	int ret = 0;
1870	int mask = 0;
1871	int cur, org = 0;
1872
1873	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1874	dev = &rte_eth_devices[port_id];
1875
1876	/*check which option changed by application*/
1877	cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1878	org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1879	if (cur != org) {
1880		dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1881		mask |= ETH_VLAN_STRIP_MASK;
1882	}
1883
1884	cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1885	org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1886	if (cur != org) {
1887		dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1888		mask |= ETH_VLAN_FILTER_MASK;
1889	}
1890
1891	cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1892	org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1893	if (cur != org) {
1894		dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1895		mask |= ETH_VLAN_EXTEND_MASK;
1896	}
1897
1898	/*no change*/
1899	if (mask == 0)
1900		return ret;
1901
1902	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1903	(*dev->dev_ops->vlan_offload_set)(dev, mask);
1904
1905	return ret;
1906}
1907
1908int
1909rte_eth_dev_get_vlan_offload(uint8_t port_id)
1910{
1911	struct rte_eth_dev *dev;
1912	int ret = 0;
1913
1914	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1915	dev = &rte_eth_devices[port_id];
1916
1917	if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1918		ret |= ETH_VLAN_STRIP_OFFLOAD;
1919
1920	if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1921		ret |= ETH_VLAN_FILTER_OFFLOAD;
1922
1923	if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1924		ret |= ETH_VLAN_EXTEND_OFFLOAD;
1925
1926	return ret;
1927}
1928
1929int
1930rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1931{
1932	struct rte_eth_dev *dev;
1933
1934	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1935	dev = &rte_eth_devices[port_id];
1936	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1937	(*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1938
1939	return 0;
1940}
1941
1942int
1943rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1944{
1945	struct rte_eth_dev *dev;
1946
1947	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1948	dev = &rte_eth_devices[port_id];
1949	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1950	memset(fc_conf, 0, sizeof(*fc_conf));
1951	return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1952}
1953
1954int
1955rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1956{
1957	struct rte_eth_dev *dev;
1958
1959	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1960	if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1961		RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1962		return -EINVAL;
1963	}
1964
1965	dev = &rte_eth_devices[port_id];
1966	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1967	return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1968}
1969
1970int
1971rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1972{
1973	struct rte_eth_dev *dev;
1974
1975	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1976	if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1977		RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1978		return -EINVAL;
1979	}
1980
1981	dev = &rte_eth_devices[port_id];
1982	/* High water, low water validation are device specific */
1983	if  (*dev->dev_ops->priority_flow_ctrl_set)
1984		return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1985	return -ENOTSUP;
1986}
1987
1988static int
1989rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1990			uint16_t reta_size)
1991{
1992	uint16_t i, num;
1993
1994	if (!reta_conf)
1995		return -EINVAL;
1996
1997	if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1998		RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1999							RTE_RETA_GROUP_SIZE);
2000		return -EINVAL;
2001	}
2002
2003	num = reta_size / RTE_RETA_GROUP_SIZE;
2004	for (i = 0; i < num; i++) {
2005		if (reta_conf[i].mask)
2006			return 0;
2007	}
2008
2009	return -EINVAL;
2010}
2011
2012static int
2013rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2014			 uint16_t reta_size,
2015			 uint16_t max_rxq)
2016{
2017	uint16_t i, idx, shift;
2018
2019	if (!reta_conf)
2020		return -EINVAL;
2021
2022	if (max_rxq == 0) {
2023		RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2024		return -EINVAL;
2025	}
2026
2027	for (i = 0; i < reta_size; i++) {
2028		idx = i / RTE_RETA_GROUP_SIZE;
2029		shift = i % RTE_RETA_GROUP_SIZE;
2030		if ((reta_conf[idx].mask & (1ULL << shift)) &&
2031			(reta_conf[idx].reta[shift] >= max_rxq)) {
2032			RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2033				"the maximum rxq index: %u\n", idx, shift,
2034				reta_conf[idx].reta[shift], max_rxq);
2035			return -EINVAL;
2036		}
2037	}
2038
2039	return 0;
2040}
2041
2042int
2043rte_eth_dev_rss_reta_update(uint8_t port_id,
2044			    struct rte_eth_rss_reta_entry64 *reta_conf,
2045			    uint16_t reta_size)
2046{
2047	struct rte_eth_dev *dev;
2048	int ret;
2049
2050	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2051	/* Check mask bits */
2052	ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2053	if (ret < 0)
2054		return ret;
2055
2056	dev = &rte_eth_devices[port_id];
2057
2058	/* Check entry value */
2059	ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2060				dev->data->nb_rx_queues);
2061	if (ret < 0)
2062		return ret;
2063
2064	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2065	return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2066}
2067
2068int
2069rte_eth_dev_rss_reta_query(uint8_t port_id,
2070			   struct rte_eth_rss_reta_entry64 *reta_conf,
2071			   uint16_t reta_size)
2072{
2073	struct rte_eth_dev *dev;
2074	int ret;
2075
2076	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2077
2078	/* Check mask bits */
2079	ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2080	if (ret < 0)
2081		return ret;
2082
2083	dev = &rte_eth_devices[port_id];
2084	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2085	return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2086}
2087
2088int
2089rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2090{
2091	struct rte_eth_dev *dev;
2092	uint16_t rss_hash_protos;
2093
2094	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2095	rss_hash_protos = rss_conf->rss_hf;
2096	if ((rss_hash_protos != 0) &&
2097	    ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2098		RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2099				rss_hash_protos);
2100		return -EINVAL;
2101	}
2102	dev = &rte_eth_devices[port_id];
2103	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2104	return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2105}
2106
2107int
2108rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2109			      struct rte_eth_rss_conf *rss_conf)
2110{
2111	struct rte_eth_dev *dev;
2112
2113	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2114	dev = &rte_eth_devices[port_id];
2115	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2116	return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2117}
2118
2119int
2120rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2121				struct rte_eth_udp_tunnel *udp_tunnel)
2122{
2123	struct rte_eth_dev *dev;
2124
2125	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2126	if (udp_tunnel == NULL) {
2127		RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2128		return -EINVAL;
2129	}
2130
2131	if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2132		RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2133		return -EINVAL;
2134	}
2135
2136	dev = &rte_eth_devices[port_id];
2137	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2138	return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2139}
2140
2141int
2142rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2143				   struct rte_eth_udp_tunnel *udp_tunnel)
2144{
2145	struct rte_eth_dev *dev;
2146
2147	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2148	dev = &rte_eth_devices[port_id];
2149
2150	if (udp_tunnel == NULL) {
2151		RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2152		return -EINVAL;
2153	}
2154
2155	if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2156		RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2157		return -EINVAL;
2158	}
2159
2160	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2161	return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2162}
2163
2164int
2165rte_eth_led_on(uint8_t port_id)
2166{
2167	struct rte_eth_dev *dev;
2168
2169	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2170	dev = &rte_eth_devices[port_id];
2171	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2172	return (*dev->dev_ops->dev_led_on)(dev);
2173}
2174
2175int
2176rte_eth_led_off(uint8_t port_id)
2177{
2178	struct rte_eth_dev *dev;
2179
2180	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2181	dev = &rte_eth_devices[port_id];
2182	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2183	return (*dev->dev_ops->dev_led_off)(dev);
2184}
2185
2186/*
2187 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2188 * an empty spot.
2189 */
2190static int
2191get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2192{
2193	struct rte_eth_dev_info dev_info;
2194	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2195	unsigned i;
2196
2197	rte_eth_dev_info_get(port_id, &dev_info);
2198
2199	for (i = 0; i < dev_info.max_mac_addrs; i++)
2200		if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2201			return i;
2202
2203	return -1;
2204}
2205
2206static const struct ether_addr null_mac_addr;
2207
2208int
2209rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2210			uint32_t pool)
2211{
2212	struct rte_eth_dev *dev;
2213	int index;
2214	uint64_t pool_mask;
2215
2216	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2217	dev = &rte_eth_devices[port_id];
2218	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2219
2220	if (is_zero_ether_addr(addr)) {
2221		RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2222			port_id);
2223		return -EINVAL;
2224	}
2225	if (pool >= ETH_64_POOLS) {
2226		RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2227		return -EINVAL;
2228	}
2229
2230	index = get_mac_addr_index(port_id, addr);
2231	if (index < 0) {
2232		index = get_mac_addr_index(port_id, &null_mac_addr);
2233		if (index < 0) {
2234			RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2235				port_id);
2236			return -ENOSPC;
2237		}
2238	} else {
2239		pool_mask = dev->data->mac_pool_sel[index];
2240
2241		/* Check if both MAC address and pool is already there, and do nothing */
2242		if (pool_mask & (1ULL << pool))
2243			return 0;
2244	}
2245
2246	/* Update NIC */
2247	(*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2248
2249	/* Update address in NIC data structure */
2250	ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2251
2252	/* Update pool bitmap in NIC data structure */
2253	dev->data->mac_pool_sel[index] |= (1ULL << pool);
2254
2255	return 0;
2256}
2257
2258int
2259rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2260{
2261	struct rte_eth_dev *dev;
2262	int index;
2263
2264	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2265	dev = &rte_eth_devices[port_id];
2266	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2267
2268	index = get_mac_addr_index(port_id, addr);
2269	if (index == 0) {
2270		RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2271		return -EADDRINUSE;
2272	} else if (index < 0)
2273		return 0;  /* Do nothing if address wasn't found */
2274
2275	/* Update NIC */
2276	(*dev->dev_ops->mac_addr_remove)(dev, index);
2277
2278	/* Update address in NIC data structure */
2279	ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2280
2281	/* reset pool bitmap */
2282	dev->data->mac_pool_sel[index] = 0;
2283
2284	return 0;
2285}
2286
2287int
2288rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2289{
2290	struct rte_eth_dev *dev;
2291
2292	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2293
2294	if (!is_valid_assigned_ether_addr(addr))
2295		return -EINVAL;
2296
2297	dev = &rte_eth_devices[port_id];
2298	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2299
2300	/* Update default address in NIC data structure */
2301	ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2302
2303	(*dev->dev_ops->mac_addr_set)(dev, addr);
2304
2305	return 0;
2306}
2307
2308int
2309rte_eth_dev_set_vf_rxmode(uint8_t port_id,  uint16_t vf,
2310				uint16_t rx_mode, uint8_t on)
2311{
2312	uint16_t num_vfs;
2313	struct rte_eth_dev *dev;
2314	struct rte_eth_dev_info dev_info;
2315
2316	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2317
2318	dev = &rte_eth_devices[port_id];
2319	rte_eth_dev_info_get(port_id, &dev_info);
2320
2321	num_vfs = dev_info.max_vfs;
2322	if (vf > num_vfs) {
2323		RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2324		return -EINVAL;
2325	}
2326
2327	if (rx_mode == 0) {
2328		RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2329		return -EINVAL;
2330	}
2331	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2332	return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2333}
2334
2335/*
2336 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2337 * an empty spot.
2338 */
2339static int
2340get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2341{
2342	struct rte_eth_dev_info dev_info;
2343	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2344	unsigned i;
2345
2346	rte_eth_dev_info_get(port_id, &dev_info);
2347	if (!dev->data->hash_mac_addrs)
2348		return -1;
2349
2350	for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2351		if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2352			ETHER_ADDR_LEN) == 0)
2353			return i;
2354
2355	return -1;
2356}
2357
2358int
2359rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2360				uint8_t on)
2361{
2362	int index;
2363	int ret;
2364	struct rte_eth_dev *dev;
2365
2366	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2367
2368	dev = &rte_eth_devices[port_id];
2369	if (is_zero_ether_addr(addr)) {
2370		RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2371			port_id);
2372		return -EINVAL;
2373	}
2374
2375	index = get_hash_mac_addr_index(port_id, addr);
2376	/* Check if it's already there, and do nothing */
2377	if ((index >= 0) && (on))
2378		return 0;
2379
2380	if (index < 0) {
2381		if (!on) {
2382			RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2383				"set in UTA\n", port_id);
2384			return -EINVAL;
2385		}
2386
2387		index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2388		if (index < 0) {
2389			RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2390					port_id);
2391			return -ENOSPC;
2392		}
2393	}
2394
2395	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2396	ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2397	if (ret == 0) {
2398		/* Update address in NIC data structure */
2399		if (on)
2400			ether_addr_copy(addr,
2401					&dev->data->hash_mac_addrs[index]);
2402		else
2403			ether_addr_copy(&null_mac_addr,
2404					&dev->data->hash_mac_addrs[index]);
2405	}
2406
2407	return ret;
2408}
2409
2410int
2411rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2412{
2413	struct rte_eth_dev *dev;
2414
2415	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2416
2417	dev = &rte_eth_devices[port_id];
2418
2419	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2420	return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2421}
2422
2423int
2424rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2425{
2426	uint16_t num_vfs;
2427	struct rte_eth_dev *dev;
2428	struct rte_eth_dev_info dev_info;
2429
2430	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2431
2432	dev = &rte_eth_devices[port_id];
2433	rte_eth_dev_info_get(port_id, &dev_info);
2434
2435	num_vfs = dev_info.max_vfs;
2436	if (vf > num_vfs) {
2437		RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2438		return -EINVAL;
2439	}
2440
2441	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2442	return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2443}
2444
2445int
2446rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2447{
2448	uint16_t num_vfs;
2449	struct rte_eth_dev *dev;
2450	struct rte_eth_dev_info dev_info;
2451
2452	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2453
2454	dev = &rte_eth_devices[port_id];
2455	rte_eth_dev_info_get(port_id, &dev_info);
2456
2457	num_vfs = dev_info.max_vfs;
2458	if (vf > num_vfs) {
2459		RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2460		return -EINVAL;
2461	}
2462
2463	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2464	return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2465}
2466
2467int
2468rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2469			       uint64_t vf_mask, uint8_t vlan_on)
2470{
2471	struct rte_eth_dev *dev;
2472
2473	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2474
2475	dev = &rte_eth_devices[port_id];
2476
2477	if (vlan_id > ETHER_MAX_VLAN_ID) {
2478		RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2479			vlan_id);
2480		return -EINVAL;
2481	}
2482
2483	if (vf_mask == 0) {
2484		RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2485		return -EINVAL;
2486	}
2487
2488	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2489	return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2490						   vf_mask, vlan_on);
2491}
2492
2493int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2494					uint16_t tx_rate)
2495{
2496	struct rte_eth_dev *dev;
2497	struct rte_eth_dev_info dev_info;
2498	struct rte_eth_link link;
2499
2500	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2501
2502	dev = &rte_eth_devices[port_id];
2503	rte_eth_dev_info_get(port_id, &dev_info);
2504	link = dev->data->dev_link;
2505
2506	if (queue_idx > dev_info.max_tx_queues) {
2507		RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2508				"invalid queue id=%d\n", port_id, queue_idx);
2509		return -EINVAL;
2510	}
2511
2512	if (tx_rate > link.link_speed) {
2513		RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2514				"bigger than link speed= %d\n",
2515			tx_rate, link.link_speed);
2516		return -EINVAL;
2517	}
2518
2519	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2520	return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2521}
2522
2523int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2524				uint64_t q_msk)
2525{
2526	struct rte_eth_dev *dev;
2527	struct rte_eth_dev_info dev_info;
2528	struct rte_eth_link link;
2529
2530	if (q_msk == 0)
2531		return 0;
2532
2533	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2534
2535	dev = &rte_eth_devices[port_id];
2536	rte_eth_dev_info_get(port_id, &dev_info);
2537	link = dev->data->dev_link;
2538
2539	if (vf > dev_info.max_vfs) {
2540		RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2541				"invalid vf id=%d\n", port_id, vf);
2542		return -EINVAL;
2543	}
2544
2545	if (tx_rate > link.link_speed) {
2546		RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2547				"bigger than link speed= %d\n",
2548				tx_rate, link.link_speed);
2549		return -EINVAL;
2550	}
2551
2552	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2553	return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2554}
2555
2556int
2557rte_eth_mirror_rule_set(uint8_t port_id,
2558			struct rte_eth_mirror_conf *mirror_conf,
2559			uint8_t rule_id, uint8_t on)
2560{
2561	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2562
2563	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2564	if (mirror_conf->rule_type == 0) {
2565		RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2566		return -EINVAL;
2567	}
2568
2569	if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2570		RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2571				ETH_64_POOLS - 1);
2572		return -EINVAL;
2573	}
2574
2575	if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2576	     ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2577	    (mirror_conf->pool_mask == 0)) {
2578		RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2579		return -EINVAL;
2580	}
2581
2582	if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2583	    mirror_conf->vlan.vlan_mask == 0) {
2584		RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2585		return -EINVAL;
2586	}
2587
2588	dev = &rte_eth_devices[port_id];
2589	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2590
2591	return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2592}
2593
2594int
2595rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2596{
2597	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2598
2599	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2600
2601	dev = &rte_eth_devices[port_id];
2602	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2603
2604	return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2605}
2606
2607int
2608rte_eth_dev_callback_register(uint8_t port_id,
2609			enum rte_eth_event_type event,
2610			rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2611{
2612	struct rte_eth_dev *dev;
2613	struct rte_eth_dev_callback *user_cb;
2614
2615	if (!cb_fn)
2616		return -EINVAL;
2617
2618	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2619
2620	dev = &rte_eth_devices[port_id];
2621	rte_spinlock_lock(&rte_eth_dev_cb_lock);
2622
2623	TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2624		if (user_cb->cb_fn == cb_fn &&
2625			user_cb->cb_arg == cb_arg &&
2626			user_cb->event == event) {
2627			break;
2628		}
2629	}
2630
2631	/* create a new callback. */
2632	if (user_cb == NULL)
2633		user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2634					sizeof(struct rte_eth_dev_callback), 0);
2635	if (user_cb != NULL) {
2636		user_cb->cb_fn = cb_fn;
2637		user_cb->cb_arg = cb_arg;
2638		user_cb->event = event;
2639		TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2640	}
2641
2642	rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2643	return (user_cb == NULL) ? -ENOMEM : 0;
2644}
2645
2646int
2647rte_eth_dev_callback_unregister(uint8_t port_id,
2648			enum rte_eth_event_type event,
2649			rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2650{
2651	int ret;
2652	struct rte_eth_dev *dev;
2653	struct rte_eth_dev_callback *cb, *next;
2654
2655	if (!cb_fn)
2656		return -EINVAL;
2657
2658	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2659
2660	dev = &rte_eth_devices[port_id];
2661	rte_spinlock_lock(&rte_eth_dev_cb_lock);
2662
2663	ret = 0;
2664	for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2665
2666		next = TAILQ_NEXT(cb, next);
2667
2668		if (cb->cb_fn != cb_fn || cb->event != event ||
2669				(cb->cb_arg != (void *)-1 &&
2670				cb->cb_arg != cb_arg))
2671			continue;
2672
2673		/*
2674		 * if this callback is not executing right now,
2675		 * then remove it.
2676		 */
2677		if (cb->active == 0) {
2678			TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2679			rte_free(cb);
2680		} else {
2681			ret = -EAGAIN;
2682		}
2683	}
2684
2685	rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2686	return ret;
2687}
2688
2689void
2690_rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2691	enum rte_eth_event_type event)
2692{
2693	struct rte_eth_dev_callback *cb_lst;
2694	struct rte_eth_dev_callback dev_cb;
2695
2696	rte_spinlock_lock(&rte_eth_dev_cb_lock);
2697	TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2698		if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2699			continue;
2700		dev_cb = *cb_lst;
2701		cb_lst->active = 1;
2702		rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2703		dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2704						dev_cb.cb_arg);
2705		rte_spinlock_lock(&rte_eth_dev_cb_lock);
2706		cb_lst->active = 0;
2707	}
2708	rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2709}
2710
2711int
2712rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2713{
2714	uint32_t vec;
2715	struct rte_eth_dev *dev;
2716	struct rte_intr_handle *intr_handle;
2717	uint16_t qid;
2718	int rc;
2719
2720	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2721
2722	dev = &rte_eth_devices[port_id];
2723	intr_handle = &dev->pci_dev->intr_handle;
2724	if (!intr_handle->intr_vec) {
2725		RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2726		return -EPERM;
2727	}
2728
2729	for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2730		vec = intr_handle->intr_vec[qid];
2731		rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2732		if (rc && rc != -EEXIST) {
2733			RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2734					" op %d epfd %d vec %u\n",
2735					port_id, qid, op, epfd, vec);
2736		}
2737	}
2738
2739	return 0;
2740}
2741
2742const struct rte_memzone *
2743rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2744			 uint16_t queue_id, size_t size, unsigned align,
2745			 int socket_id)
2746{
2747	char z_name[RTE_MEMZONE_NAMESIZE];
2748	const struct rte_memzone *mz;
2749
2750	snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2751		 dev->driver->pci_drv.name, ring_name,
2752		 dev->data->port_id, queue_id);
2753
2754	mz = rte_memzone_lookup(z_name);
2755	if (mz)
2756		return mz;
2757
2758	if (rte_xen_dom0_supported())
2759		return rte_memzone_reserve_bounded(z_name, size, socket_id,
2760						   0, align, RTE_PGSIZE_2M);
2761	else
2762		return rte_memzone_reserve_aligned(z_name, size, socket_id,
2763						   0, align);
2764}
2765
2766int
2767rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2768			  int epfd, int op, void *data)
2769{
2770	uint32_t vec;
2771	struct rte_eth_dev *dev;
2772	struct rte_intr_handle *intr_handle;
2773	int rc;
2774
2775	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2776
2777	dev = &rte_eth_devices[port_id];
2778	if (queue_id >= dev->data->nb_rx_queues) {
2779		RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2780		return -EINVAL;
2781	}
2782
2783	intr_handle = &dev->pci_dev->intr_handle;
2784	if (!intr_handle->intr_vec) {
2785		RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2786		return -EPERM;
2787	}
2788
2789	vec = intr_handle->intr_vec[queue_id];
2790	rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2791	if (rc && rc != -EEXIST) {
2792		RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2793				" op %d epfd %d vec %u\n",
2794				port_id, queue_id, op, epfd, vec);
2795		return rc;
2796	}
2797
2798	return 0;
2799}
2800
2801int
2802rte_eth_dev_rx_intr_enable(uint8_t port_id,
2803			   uint16_t queue_id)
2804{
2805	struct rte_eth_dev *dev;
2806
2807	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2808
2809	dev = &rte_eth_devices[port_id];
2810
2811	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2812	return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2813}
2814
2815int
2816rte_eth_dev_rx_intr_disable(uint8_t port_id,
2817			    uint16_t queue_id)
2818{
2819	struct rte_eth_dev *dev;
2820
2821	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2822
2823	dev = &rte_eth_devices[port_id];
2824
2825	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2826	return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2827}
2828
2829#ifdef RTE_NIC_BYPASS
2830int rte_eth_dev_bypass_init(uint8_t port_id)
2831{
2832	struct rte_eth_dev *dev;
2833
2834	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2835
2836	dev = &rte_eth_devices[port_id];
2837	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2838	(*dev->dev_ops->bypass_init)(dev);
2839	return 0;
2840}
2841
2842int
2843rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2844{
2845	struct rte_eth_dev *dev;
2846
2847	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2848
2849	dev = &rte_eth_devices[port_id];
2850	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2851	(*dev->dev_ops->bypass_state_show)(dev, state);
2852	return 0;
2853}
2854
2855int
2856rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2857{
2858	struct rte_eth_dev *dev;
2859
2860	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2861
2862	dev = &rte_eth_devices[port_id];
2863	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2864	(*dev->dev_ops->bypass_state_set)(dev, new_state);
2865	return 0;
2866}
2867
2868int
2869rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2870{
2871	struct rte_eth_dev *dev;
2872
2873	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2874
2875	dev = &rte_eth_devices[port_id];
2876	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2877	(*dev->dev_ops->bypass_event_show)(dev, event, state);
2878	return 0;
2879}
2880
2881int
2882rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2883{
2884	struct rte_eth_dev *dev;
2885
2886	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2887
2888	dev = &rte_eth_devices[port_id];
2889
2890	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2891	(*dev->dev_ops->bypass_event_set)(dev, event, state);
2892	return 0;
2893}
2894
2895int
2896rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2897{
2898	struct rte_eth_dev *dev;
2899
2900	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2901
2902	dev = &rte_eth_devices[port_id];
2903
2904	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2905	(*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2906	return 0;
2907}
2908
2909int
2910rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2911{
2912	struct rte_eth_dev *dev;
2913
2914	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2915
2916	dev = &rte_eth_devices[port_id];
2917
2918	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2919	(*dev->dev_ops->bypass_ver_show)(dev, ver);
2920	return 0;
2921}
2922
2923int
2924rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2925{
2926	struct rte_eth_dev *dev;
2927
2928	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2929
2930	dev = &rte_eth_devices[port_id];
2931
2932	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2933	(*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2934	return 0;
2935}
2936
2937int
2938rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2939{
2940	struct rte_eth_dev *dev;
2941
2942	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2943
2944	dev = &rte_eth_devices[port_id];
2945
2946	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2947	(*dev->dev_ops->bypass_wd_reset)(dev);
2948	return 0;
2949}
2950#endif
2951
2952int
2953rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2954{
2955	struct rte_eth_dev *dev;
2956
2957	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2958
2959	dev = &rte_eth_devices[port_id];
2960	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2961	return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2962				RTE_ETH_FILTER_NOP, NULL);
2963}
2964
2965int
2966rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2967		       enum rte_filter_op filter_op, void *arg)
2968{
2969	struct rte_eth_dev *dev;
2970
2971	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2972
2973	dev = &rte_eth_devices[port_id];
2974	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2975	return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2976}
2977
2978void *
2979rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2980		rte_rx_callback_fn fn, void *user_param)
2981{
2982#ifndef RTE_ETHDEV_RXTX_CALLBACKS
2983	rte_errno = ENOTSUP;
2984	return NULL;
2985#endif
2986	/* check input parameters */
2987	if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2988		    queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2989		rte_errno = EINVAL;
2990		return NULL;
2991	}
2992	struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2993
2994	if (cb == NULL) {
2995		rte_errno = ENOMEM;
2996		return NULL;
2997	}
2998
2999	cb->fn.rx = fn;
3000	cb->param = user_param;
3001
3002	rte_spinlock_lock(&rte_eth_rx_cb_lock);
3003	/* Add the callbacks in fifo order. */
3004	struct rte_eth_rxtx_callback *tail =
3005		rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3006
3007	if (!tail) {
3008		rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3009
3010	} else {
3011		while (tail->next)
3012			tail = tail->next;
3013		tail->next = cb;
3014	}
3015	rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3016
3017	return cb;
3018}
3019
3020void *
3021rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
3022		rte_rx_callback_fn fn, void *user_param)
3023{
3024#ifndef RTE_ETHDEV_RXTX_CALLBACKS
3025	rte_errno = ENOTSUP;
3026	return NULL;
3027#endif
3028	/* check input parameters */
3029	if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3030		queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3031		rte_errno = EINVAL;
3032		return NULL;
3033	}
3034
3035	struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3036
3037	if (cb == NULL) {
3038		rte_errno = ENOMEM;
3039		return NULL;
3040	}
3041
3042	cb->fn.rx = fn;
3043	cb->param = user_param;
3044
3045	rte_spinlock_lock(&rte_eth_rx_cb_lock);
3046	/* Add the callbacks at fisrt position*/
3047	cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3048	rte_smp_wmb();
3049	rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3050	rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3051
3052	return cb;
3053}
3054
3055void *
3056rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
3057		rte_tx_callback_fn fn, void *user_param)
3058{
3059#ifndef RTE_ETHDEV_RXTX_CALLBACKS
3060	rte_errno = ENOTSUP;
3061	return NULL;
3062#endif
3063	/* check input parameters */
3064	if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3065		    queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3066		rte_errno = EINVAL;
3067		return NULL;
3068	}
3069
3070	struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3071
3072	if (cb == NULL) {
3073		rte_errno = ENOMEM;
3074		return NULL;
3075	}
3076
3077	cb->fn.tx = fn;
3078	cb->param = user_param;
3079
3080	rte_spinlock_lock(&rte_eth_tx_cb_lock);
3081	/* Add the callbacks in fifo order. */
3082	struct rte_eth_rxtx_callback *tail =
3083		rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3084
3085	if (!tail) {
3086		rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3087
3088	} else {
3089		while (tail->next)
3090			tail = tail->next;
3091		tail->next = cb;
3092	}
3093	rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3094
3095	return cb;
3096}
3097
3098int
3099rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3100		struct rte_eth_rxtx_callback *user_cb)
3101{
3102#ifndef RTE_ETHDEV_RXTX_CALLBACKS
3103	return -ENOTSUP;
3104#endif
3105	/* Check input parameters. */
3106	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3107	if (user_cb == NULL ||
3108			queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3109		return -EINVAL;
3110
3111	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3112	struct rte_eth_rxtx_callback *cb;
3113	struct rte_eth_rxtx_callback **prev_cb;
3114	int ret = -EINVAL;
3115
3116	rte_spinlock_lock(&rte_eth_rx_cb_lock);
3117	prev_cb = &dev->post_rx_burst_cbs[queue_id];
3118	for (; *prev_cb != NULL; prev_cb = &cb->next) {
3119		cb = *prev_cb;
3120		if (cb == user_cb) {
3121			/* Remove the user cb from the callback list. */
3122			*prev_cb = cb->next;
3123			ret = 0;
3124			break;
3125		}
3126	}
3127	rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3128
3129	return ret;
3130}
3131
3132int
3133rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3134		struct rte_eth_rxtx_callback *user_cb)
3135{
3136#ifndef RTE_ETHDEV_RXTX_CALLBACKS
3137	return -ENOTSUP;
3138#endif
3139	/* Check input parameters. */
3140	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3141	if (user_cb == NULL ||
3142			queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3143		return -EINVAL;
3144
3145	struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3146	int ret = -EINVAL;
3147	struct rte_eth_rxtx_callback *cb;
3148	struct rte_eth_rxtx_callback **prev_cb;
3149
3150	rte_spinlock_lock(&rte_eth_tx_cb_lock);
3151	prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3152	for (; *prev_cb != NULL; prev_cb = &cb->next) {
3153		cb = *prev_cb;
3154		if (cb == user_cb) {
3155			/* Remove the user cb from the callback list. */
3156			*prev_cb = cb->next;
3157			ret = 0;
3158			break;
3159		}
3160	}
3161	rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3162
3163	return ret;
3164}
3165
3166int
3167rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3168	struct rte_eth_rxq_info *qinfo)
3169{
3170	struct rte_eth_dev *dev;
3171
3172	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3173
3174	if (qinfo == NULL)
3175		return -EINVAL;
3176
3177	dev = &rte_eth_devices[port_id];
3178	if (queue_id >= dev->data->nb_rx_queues) {
3179		RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3180		return -EINVAL;
3181	}
3182
3183	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3184
3185	memset(qinfo, 0, sizeof(*qinfo));
3186	dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3187	return 0;
3188}
3189
3190int
3191rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3192	struct rte_eth_txq_info *qinfo)
3193{
3194	struct rte_eth_dev *dev;
3195
3196	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3197
3198	if (qinfo == NULL)
3199		return -EINVAL;
3200
3201	dev = &rte_eth_devices[port_id];
3202	if (queue_id >= dev->data->nb_tx_queues) {
3203		RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3204		return -EINVAL;
3205	}
3206
3207	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3208
3209	memset(qinfo, 0, sizeof(*qinfo));
3210	dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3211	return 0;
3212}
3213
3214int
3215rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3216			     struct ether_addr *mc_addr_set,
3217			     uint32_t nb_mc_addr)
3218{
3219	struct rte_eth_dev *dev;
3220
3221	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3222
3223	dev = &rte_eth_devices[port_id];
3224	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3225	return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3226}
3227
3228int
3229rte_eth_timesync_enable(uint8_t port_id)
3230{
3231	struct rte_eth_dev *dev;
3232
3233	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3234	dev = &rte_eth_devices[port_id];
3235
3236	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3237	return (*dev->dev_ops->timesync_enable)(dev);
3238}
3239
3240int
3241rte_eth_timesync_disable(uint8_t port_id)
3242{
3243	struct rte_eth_dev *dev;
3244
3245	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3246	dev = &rte_eth_devices[port_id];
3247
3248	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3249	return (*dev->dev_ops->timesync_disable)(dev);
3250}
3251
3252int
3253rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3254				   uint32_t flags)
3255{
3256	struct rte_eth_dev *dev;
3257
3258	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3259	dev = &rte_eth_devices[port_id];
3260
3261	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3262	return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3263}
3264
3265int
3266rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3267{
3268	struct rte_eth_dev *dev;
3269
3270	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3271	dev = &rte_eth_devices[port_id];
3272
3273	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3274	return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3275}
3276
3277int
3278rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3279{
3280	struct rte_eth_dev *dev;
3281
3282	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3283	dev = &rte_eth_devices[port_id];
3284
3285	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3286	return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3287}
3288
3289int
3290rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3291{
3292	struct rte_eth_dev *dev;
3293
3294	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3295	dev = &rte_eth_devices[port_id];
3296
3297	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3298	return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3299}
3300
3301int
3302rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3303{
3304	struct rte_eth_dev *dev;
3305
3306	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3307	dev = &rte_eth_devices[port_id];
3308
3309	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3310	return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3311}
3312
3313int
3314rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3315{
3316	struct rte_eth_dev *dev;
3317
3318	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3319
3320	dev = &rte_eth_devices[port_id];
3321	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3322	return (*dev->dev_ops->get_reg)(dev, info);
3323}
3324
3325int
3326rte_eth_dev_get_eeprom_length(uint8_t port_id)
3327{
3328	struct rte_eth_dev *dev;
3329
3330	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3331
3332	dev = &rte_eth_devices[port_id];
3333	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3334	return (*dev->dev_ops->get_eeprom_length)(dev);
3335}
3336
3337int
3338rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3339{
3340	struct rte_eth_dev *dev;
3341
3342	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3343
3344	dev = &rte_eth_devices[port_id];
3345	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3346	return (*dev->dev_ops->get_eeprom)(dev, info);
3347}
3348
3349int
3350rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3351{
3352	struct rte_eth_dev *dev;
3353
3354	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3355
3356	dev = &rte_eth_devices[port_id];
3357	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3358	return (*dev->dev_ops->set_eeprom)(dev, info);
3359}
3360
3361int
3362rte_eth_dev_get_dcb_info(uint8_t port_id,
3363			     struct rte_eth_dcb_info *dcb_info)
3364{
3365	struct rte_eth_dev *dev;
3366
3367	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3368
3369	dev = &rte_eth_devices[port_id];
3370	memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3371
3372	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3373	return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3374}
3375
3376void
3377rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3378{
3379	if ((eth_dev == NULL) || (pci_dev == NULL)) {
3380		RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3381				eth_dev, pci_dev);
3382		return;
3383	}
3384
3385	eth_dev->data->dev_flags = 0;
3386	if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3387		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3388	if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3389		eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3390
3391	eth_dev->data->kdrv = pci_dev->kdrv;
3392	eth_dev->data->numa_node = pci_dev->numa_node;
3393	eth_dev->data->drv_name = pci_dev->driver->name;
3394}
3395
3396int
3397rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3398				    struct rte_eth_l2_tunnel_conf *l2_tunnel)
3399{
3400	struct rte_eth_dev *dev;
3401
3402	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3403	if (l2_tunnel == NULL) {
3404		RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3405		return -EINVAL;
3406	}
3407
3408	if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3409		RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3410		return -EINVAL;
3411	}
3412
3413	dev = &rte_eth_devices[port_id];
3414	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3415				-ENOTSUP);
3416	return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3417}
3418
3419int
3420rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3421				  struct rte_eth_l2_tunnel_conf *l2_tunnel,
3422				  uint32_t mask,
3423				  uint8_t en)
3424{
3425	struct rte_eth_dev *dev;
3426
3427	RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3428
3429	if (l2_tunnel == NULL) {
3430		RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3431		return -EINVAL;
3432	}
3433
3434	if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3435		RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3436		return -EINVAL;
3437	}
3438
3439	if (mask == 0) {
3440		RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3441		return -EINVAL;
3442	}
3443
3444	dev = &rte_eth_devices[port_id];
3445	RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3446				-ENOTSUP);
3447	return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3448}
3449