1a551c94aSIdo Barnea/*******************************************************************************
2a551c94aSIdo Barnea
3a551c94aSIdo BarneaCopyright (c) 2001-2015, Intel Corporation
4a551c94aSIdo BarneaAll rights reserved.
5a551c94aSIdo Barnea
6a551c94aSIdo BarneaRedistribution and use in source and binary forms, with or without
7a551c94aSIdo Barneamodification, are permitted provided that the following conditions are met:
8a551c94aSIdo Barnea
9a551c94aSIdo Barnea 1. Redistributions of source code must retain the above copyright notice,
10a551c94aSIdo Barnea    this list of conditions and the following disclaimer.
11a551c94aSIdo Barnea
12a551c94aSIdo Barnea 2. Redistributions in binary form must reproduce the above copyright
13a551c94aSIdo Barnea    notice, this list of conditions and the following disclaimer in the
14a551c94aSIdo Barnea    documentation and/or other materials provided with the distribution.
15a551c94aSIdo Barnea
16a551c94aSIdo Barnea 3. Neither the name of the Intel Corporation nor the names of its
17a551c94aSIdo Barnea    contributors may be used to endorse or promote products derived from
18a551c94aSIdo Barnea    this software without specific prior written permission.
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20a551c94aSIdo BarneaTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21a551c94aSIdo BarneaAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22a551c94aSIdo BarneaIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23a551c94aSIdo BarneaARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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25a551c94aSIdo BarneaCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26a551c94aSIdo BarneaSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27a551c94aSIdo BarneaINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28a551c94aSIdo BarneaCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29a551c94aSIdo BarneaARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30a551c94aSIdo BarneaPOSSIBILITY OF SUCH DAMAGE.
31a551c94aSIdo Barnea
32a551c94aSIdo Barnea***************************************************************************/
33a551c94aSIdo Barnea
34a551c94aSIdo Barnea#ifndef _E1000_API_H_
35a551c94aSIdo Barnea#define _E1000_API_H_
36a551c94aSIdo Barnea
37a551c94aSIdo Barnea#include "e1000_hw.h"
38a551c94aSIdo Barnea
39a551c94aSIdo Barneaextern void e1000_init_function_pointers_82542(struct e1000_hw *hw);
40a551c94aSIdo Barneaextern void e1000_init_function_pointers_82543(struct e1000_hw *hw);
41a551c94aSIdo Barneaextern void e1000_init_function_pointers_82540(struct e1000_hw *hw);
42a551c94aSIdo Barneaextern void e1000_init_function_pointers_82571(struct e1000_hw *hw);
43a551c94aSIdo Barneaextern void e1000_init_function_pointers_82541(struct e1000_hw *hw);
44a551c94aSIdo Barneaextern void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw);
45a551c94aSIdo Barneaextern void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw);
46a551c94aSIdo Barneaextern void e1000_init_function_pointers_82575(struct e1000_hw *hw);
47a551c94aSIdo Barneaextern void e1000_rx_fifo_flush_82575(struct e1000_hw *hw);
48a551c94aSIdo Barneaextern void e1000_init_function_pointers_vf(struct e1000_hw *hw);
49a551c94aSIdo Barneaextern void e1000_power_up_fiber_serdes_link(struct e1000_hw *hw);
50a551c94aSIdo Barneaextern void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw);
51a551c94aSIdo Barneaextern void e1000_init_function_pointers_i210(struct e1000_hw *hw);
52a551c94aSIdo Barnea
53a551c94aSIdo Barneas32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr);
54a551c94aSIdo Barneas32 e1000_set_mac_type(struct e1000_hw *hw);
55a551c94aSIdo Barneas32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device);
56a551c94aSIdo Barneas32 e1000_init_mac_params(struct e1000_hw *hw);
57a551c94aSIdo Barneas32 e1000_init_nvm_params(struct e1000_hw *hw);
58a551c94aSIdo Barneas32 e1000_init_phy_params(struct e1000_hw *hw);
59a551c94aSIdo Barneas32 e1000_init_mbx_params(struct e1000_hw *hw);
60a551c94aSIdo Barneas32 e1000_get_bus_info(struct e1000_hw *hw);
61a551c94aSIdo Barneavoid e1000_clear_vfta(struct e1000_hw *hw);
62a551c94aSIdo Barneavoid e1000_write_vfta(struct e1000_hw *hw, u32 offset, u32 value);
63a551c94aSIdo Barneas32 e1000_force_mac_fc(struct e1000_hw *hw);
64a551c94aSIdo Barneas32 e1000_check_for_link(struct e1000_hw *hw);
65a551c94aSIdo Barneas32 e1000_reset_hw(struct e1000_hw *hw);
66a551c94aSIdo Barneas32 e1000_init_hw(struct e1000_hw *hw);
67a551c94aSIdo Barneas32 e1000_setup_link(struct e1000_hw *hw);
68a551c94aSIdo Barneas32 e1000_get_speed_and_duplex(struct e1000_hw *hw, u16 *speed, u16 *duplex);
69a551c94aSIdo Barneas32 e1000_disable_pcie_master(struct e1000_hw *hw);
70a551c94aSIdo Barneavoid e1000_config_collision_dist(struct e1000_hw *hw);
71a551c94aSIdo Barneaint e1000_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
72a551c94aSIdo Barneau32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr);
73a551c94aSIdo Barneavoid e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
74a551c94aSIdo Barnea			       u32 mc_addr_count);
75a551c94aSIdo Barneas32 e1000_setup_led(struct e1000_hw *hw);
76a551c94aSIdo Barneas32 e1000_cleanup_led(struct e1000_hw *hw);
77a551c94aSIdo Barneas32 e1000_check_reset_block(struct e1000_hw *hw);
78a551c94aSIdo Barneas32 e1000_blink_led(struct e1000_hw *hw);
79a551c94aSIdo Barneas32 e1000_led_on(struct e1000_hw *hw);
80a551c94aSIdo Barneas32 e1000_led_off(struct e1000_hw *hw);
81a551c94aSIdo Barneas32 e1000_id_led_init(struct e1000_hw *hw);
82a551c94aSIdo Barneavoid e1000_reset_adaptive(struct e1000_hw *hw);
83a551c94aSIdo Barneavoid e1000_update_adaptive(struct e1000_hw *hw);
84a551c94aSIdo Barneas32 e1000_get_cable_length(struct e1000_hw *hw);
85a551c94aSIdo Barneas32 e1000_validate_mdi_setting(struct e1000_hw *hw);
86a551c94aSIdo Barneas32 e1000_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data);
87a551c94aSIdo Barneas32 e1000_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data);
88a551c94aSIdo Barneas32 e1000_write_8bit_ctrl_reg(struct e1000_hw *hw, u32 reg, u32 offset,
89a551c94aSIdo Barnea			      u8 data);
90a551c94aSIdo Barneas32 e1000_get_phy_info(struct e1000_hw *hw);
91a551c94aSIdo Barneavoid e1000_release_phy(struct e1000_hw *hw);
92a551c94aSIdo Barneas32 e1000_acquire_phy(struct e1000_hw *hw);
93a551c94aSIdo Barneas32 e1000_cfg_on_link_up(struct e1000_hw *hw);
94a551c94aSIdo Barneas32 e1000_phy_hw_reset(struct e1000_hw *hw);
95a551c94aSIdo Barneas32 e1000_phy_commit(struct e1000_hw *hw);
96a551c94aSIdo Barneavoid e1000_power_up_phy(struct e1000_hw *hw);
97a551c94aSIdo Barneavoid e1000_power_down_phy(struct e1000_hw *hw);
98a551c94aSIdo Barneas32 e1000_read_mac_addr(struct e1000_hw *hw);
99a551c94aSIdo Barneas32 e1000_read_pba_num(struct e1000_hw *hw, u32 *part_num);
100a551c94aSIdo Barneas32 e1000_read_pba_string(struct e1000_hw *hw, u8 *pba_num, u32 pba_num_size);
101a551c94aSIdo Barneas32 e1000_read_pba_length(struct e1000_hw *hw, u32 *pba_num_size);
102a551c94aSIdo Barneavoid e1000_reload_nvm(struct e1000_hw *hw);
103a551c94aSIdo Barneas32 e1000_update_nvm_checksum(struct e1000_hw *hw);
104a551c94aSIdo Barneas32 e1000_validate_nvm_checksum(struct e1000_hw *hw);
105a551c94aSIdo Barneas32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
106a551c94aSIdo Barneas32 e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
107a551c94aSIdo Barneas32 e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
108a551c94aSIdo Barneas32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
109a551c94aSIdo Barneas32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
110a551c94aSIdo Barneas32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active);
111a551c94aSIdo Barneabool e1000_check_mng_mode(struct e1000_hw *hw);
112a551c94aSIdo Barneabool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw);
113a551c94aSIdo Barneas32 e1000_mng_enable_host_if(struct e1000_hw *hw);
114a551c94aSIdo Barneas32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, u16 length,
115a551c94aSIdo Barnea			    u16 offset, u8 *sum);
116a551c94aSIdo Barneas32 e1000_mng_write_cmd_header(struct e1000_hw *hw,
117a551c94aSIdo Barnea			       struct e1000_host_mng_command_header *hdr);
118a551c94aSIdo Barneas32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
119a551c94aSIdo Barneau32  e1000_translate_register_82542(u32 reg);
120a551c94aSIdo Barnea
121a551c94aSIdo Barnea
122a551c94aSIdo Barnea
123a551c94aSIdo Barnea/*
124a551c94aSIdo Barnea * TBI_ACCEPT macro definition:
125a551c94aSIdo Barnea *
126a551c94aSIdo Barnea * This macro requires:
127a551c94aSIdo Barnea *      a = a pointer to struct e1000_hw
128a551c94aSIdo Barnea *      status = the 8 bit status field of the Rx descriptor with EOP set
129a551c94aSIdo Barnea *      errors = the 8 bit error field of the Rx descriptor with EOP set
130a551c94aSIdo Barnea *      length = the sum of all the length fields of the Rx descriptors that
131a551c94aSIdo Barnea *               make up the current frame
132a551c94aSIdo Barnea *      last_byte = the last byte of the frame DMAed by the hardware
133a551c94aSIdo Barnea *      min_frame_size = the minimum frame length we want to accept.
134a551c94aSIdo Barnea *      max_frame_size = the maximum frame length we want to accept.
135a551c94aSIdo Barnea *
136a551c94aSIdo Barnea * This macro is a conditional that should be used in the interrupt
137a551c94aSIdo Barnea * handler's Rx processing routine when RxErrors have been detected.
138a551c94aSIdo Barnea *
139a551c94aSIdo Barnea * Typical use:
140a551c94aSIdo Barnea *  ...
141a551c94aSIdo Barnea *  if (TBI_ACCEPT) {
142a551c94aSIdo Barnea *      accept_frame = true;
143a551c94aSIdo Barnea *      e1000_tbi_adjust_stats(adapter, MacAddress);
144a551c94aSIdo Barnea *      frame_length--;
145a551c94aSIdo Barnea *  } else {
146a551c94aSIdo Barnea *      accept_frame = false;
147a551c94aSIdo Barnea *  }
148a551c94aSIdo Barnea *  ...
149a551c94aSIdo Barnea */
150a551c94aSIdo Barnea
151a551c94aSIdo Barnea/* The carrier extension symbol, as received by the NIC. */
152a551c94aSIdo Barnea#define CARRIER_EXTENSION   0x0F
153a551c94aSIdo Barnea
154a551c94aSIdo Barnea#define TBI_ACCEPT(a, status, errors, length, last_byte, \
155a551c94aSIdo Barnea		   min_frame_size, max_frame_size) \
156a551c94aSIdo Barnea	(e1000_tbi_sbp_enabled_82543(a) && \
157a551c94aSIdo Barnea	 (((errors) & E1000_RXD_ERR_FRAME_ERR_MASK) == E1000_RXD_ERR_CE) && \
158a551c94aSIdo Barnea	 ((last_byte) == CARRIER_EXTENSION) && \
159a551c94aSIdo Barnea	 (((status) & E1000_RXD_STAT_VP) ? \
160a551c94aSIdo Barnea	  (((length) > ((min_frame_size) - VLAN_TAG_SIZE)) && \
161a551c94aSIdo Barnea	  ((length) <= ((max_frame_size) + 1))) : \
162a551c94aSIdo Barnea	  (((length) > (min_frame_size)) && \
163a551c94aSIdo Barnea	  ((length) <= ((max_frame_size) + VLAN_TAG_SIZE + 1)))))
164a551c94aSIdo Barnea
165a551c94aSIdo Barnea#define E1000_MAX(a, b) ((a) > (b) ? (a) : (b))
166a551c94aSIdo Barnea#define E1000_DIVIDE_ROUND_UP(a, b)	(((a) + (b) - 1) / (b)) /* ceil(a/b) */
167a551c94aSIdo Barnea#endif /* _E1000_API_H_ */
168