1/******************************************************************************
2
3  Copyright (c) 2001-2014, Intel Corporation
4  All rights reserved.
5
6  Redistribution and use in source and binary forms, with or without
7  modification, are permitted provided that the following conditions are met:
8
9   1. Redistributions of source code must retain the above copyright notice,
10      this list of conditions and the following disclaimer.
11
12   2. Redistributions in binary form must reproduce the above copyright
13      notice, this list of conditions and the following disclaimer in the
14      documentation and/or other materials provided with the distribution.
15
16   3. Neither the name of the Intel Corporation nor the names of its
17      contributors may be used to endorse or promote products derived from
18      this software without specific prior written permission.
19
20  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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24  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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29  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  POSSIBILITY OF SUCH DAMAGE.
31
32******************************************************************************/
33/*$FreeBSD$*/
34
35#ifndef _E1000_OSDEP_H_
36#define _E1000_OSDEP_H_
37
38#include <stdint.h>
39#include <stdio.h>
40#include <stdarg.h>
41#include <string.h>
42#include <rte_common.h>
43#include <rte_cycles.h>
44#include <rte_log.h>
45#include <rte_debug.h>
46#include <rte_byteorder.h>
47#include <rte_io.h>
48
49#include "../e1000_logs.h"
50
51#define DELAY(x) rte_delay_us(x)
52#define usec_delay(x) DELAY(x)
53#define usec_delay_irq(x) DELAY(x)
54#define msec_delay(x) DELAY(1000*(x))
55#define msec_delay_irq(x) DELAY(1000*(x))
56
57#define DEBUGFUNC(F)            DEBUGOUT(F "\n");
58#define DEBUGOUT(S, args...)    PMD_DRV_LOG_RAW(DEBUG, S, ##args)
59#define DEBUGOUT1(S, args...)   DEBUGOUT(S, ##args)
60#define DEBUGOUT2(S, args...)   DEBUGOUT(S, ##args)
61#define DEBUGOUT3(S, args...)   DEBUGOUT(S, ##args)
62#define DEBUGOUT6(S, args...)   DEBUGOUT(S, ##args)
63#define DEBUGOUT7(S, args...)   DEBUGOUT(S, ##args)
64
65#define UNREFERENCED_PARAMETER(_p)
66#define UNREFERENCED_1PARAMETER(_p)
67#define UNREFERENCED_2PARAMETER(_p, _q)
68#define UNREFERENCED_3PARAMETER(_p, _q, _r)
69#define UNREFERENCED_4PARAMETER(_p, _q, _r, _s)
70
71#define FALSE			0
72#define TRUE			1
73
74#define	CMD_MEM_WRT_INVALIDATE	0x0010  /* BIT_4 */
75
76/* Mutex used in the shared code */
77#define E1000_MUTEX                     uintptr_t
78#define E1000_MUTEX_INIT(mutex)         (*(mutex) = 0)
79#define E1000_MUTEX_LOCK(mutex)         (*(mutex) = 1)
80#define E1000_MUTEX_UNLOCK(mutex)       (*(mutex) = 0)
81
82typedef uint64_t	u64;
83typedef uint32_t	u32;
84typedef uint16_t	u16;
85typedef uint8_t		u8;
86typedef int64_t		s64;
87typedef int32_t		s32;
88typedef int16_t		s16;
89typedef int8_t		s8;
90typedef int		bool;
91
92#define __le16		u16
93#define __le32		u32
94#define __le64		u64
95
96#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
97
98#define E1000_PCI_REG(reg)	rte_read32(reg)
99
100#define E1000_PCI_REG16(reg)	rte_read16(reg)
101
102#define E1000_PCI_REG_WRITE(reg, value)			\
103	rte_write32((rte_cpu_to_le_32(value)), reg)
104
105#define E1000_PCI_REG_WRITE_RELAXED(reg, value)		\
106	rte_write32_relaxed((rte_cpu_to_le_32(value)), reg)
107
108#define E1000_PCI_REG_WRITE16(reg, value)		\
109	rte_write16((rte_cpu_to_le_16(value)), reg)
110
111#define E1000_PCI_REG_ADDR(hw, reg) \
112	((volatile uint32_t *)((char *)(hw)->hw_addr + (reg)))
113
114#define E1000_PCI_REG_ARRAY_ADDR(hw, reg, index) \
115	E1000_PCI_REG_ADDR((hw), (reg) + ((index) << 2))
116
117#define E1000_PCI_REG_FLASH_ADDR(hw, reg) \
118	((volatile uint32_t *)((char *)(hw)->flash_address + (reg)))
119
120static inline uint32_t e1000_read_addr(volatile void *addr)
121{
122	return rte_le_to_cpu_32(E1000_PCI_REG(addr));
123}
124
125static inline uint16_t e1000_read_addr16(volatile void *addr)
126{
127	return rte_le_to_cpu_16(E1000_PCI_REG16(addr));
128}
129
130/* Necessary defines */
131#define E1000_MRQC_ENABLE_MASK                  0x00000007
132#define E1000_MRQC_RSS_FIELD_IPV6_EX		0x00080000
133#define E1000_ALL_FULL_DUPLEX   ( \
134        ADVERTISE_10_FULL | ADVERTISE_100_FULL | ADVERTISE_1000_FULL)
135
136#define M88E1543_E_PHY_ID    0x01410EA0
137#define ULP_SUPPORT
138
139#define E1000_RCTL_DTYP_MASK	0x00000C00 /* Descriptor type mask */
140#define E1000_MRQC_RSS_FIELD_IPV6_EX            0x00080000
141
142/* Register READ/WRITE macros */
143
144#define E1000_READ_REG(hw, reg) \
145	e1000_read_addr(E1000_PCI_REG_ADDR((hw), (reg)))
146
147#define E1000_WRITE_REG(hw, reg, value) \
148	E1000_PCI_REG_WRITE(E1000_PCI_REG_ADDR((hw), (reg)), (value))
149
150#define E1000_READ_REG_ARRAY(hw, reg, index) \
151	E1000_PCI_REG(E1000_PCI_REG_ARRAY_ADDR((hw), (reg), (index)))
152
153#define E1000_WRITE_REG_ARRAY(hw, reg, index, value) \
154	E1000_PCI_REG_WRITE(E1000_PCI_REG_ARRAY_ADDR((hw), (reg), (index)), (value))
155
156#define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
157#define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
158
159#define	E1000_ACCESS_PANIC(x, hw, reg, value) \
160	rte_panic("%s:%u\t" RTE_STR(x) "(%p, 0x%x, 0x%x)", \
161		__FILE__, __LINE__, (hw), (reg), (unsigned int)(value))
162
163/*
164 * To be able to do IO write, we need to map IO BAR
165 * (bar 2/4 depending on device).
166 * Right now mapping multiple BARs is not supported by DPDK.
167 * Fortunatelly we need it only for legacy hw support.
168 */
169
170#define E1000_WRITE_REG_IO(hw, reg, value) \
171	E1000_WRITE_REG(hw, reg, value)
172
173/*
174 * Tested on I217/I218 chipset.
175 */
176
177#define E1000_READ_FLASH_REG(hw, reg) \
178	e1000_read_addr(E1000_PCI_REG_FLASH_ADDR((hw), (reg)))
179
180#define E1000_READ_FLASH_REG16(hw, reg)  \
181	e1000_read_addr16(E1000_PCI_REG_FLASH_ADDR((hw), (reg)))
182
183#define E1000_WRITE_FLASH_REG(hw, reg, value)  \
184	E1000_PCI_REG_WRITE(E1000_PCI_REG_FLASH_ADDR((hw), (reg)), (value))
185
186#define E1000_WRITE_FLASH_REG16(hw, reg, value) \
187	E1000_PCI_REG_WRITE16(E1000_PCI_REG_FLASH_ADDR((hw), (reg)), (value))
188
189#define STATIC static
190
191#ifndef ETH_ADDR_LEN
192#define ETH_ADDR_LEN                  6
193#endif
194
195#define false                         FALSE
196#define true                          TRUE
197
198#endif /* _E1000_OSDEP_H_ */
199