1a551c94aSIdo Barnea/*******************************************************************************
2a551c94aSIdo Barnea
3a551c94aSIdo BarneaCopyright (c) 2001-2015, Intel Corporation
4a551c94aSIdo BarneaAll rights reserved.
5a551c94aSIdo Barnea
6a551c94aSIdo BarneaRedistribution and use in source and binary forms, with or without
7a551c94aSIdo Barneamodification, are permitted provided that the following conditions are met:
8a551c94aSIdo Barnea
9a551c94aSIdo Barnea 1. Redistributions of source code must retain the above copyright notice,
10a551c94aSIdo Barnea    this list of conditions and the following disclaimer.
11a551c94aSIdo Barnea
12a551c94aSIdo Barnea 2. Redistributions in binary form must reproduce the above copyright
13a551c94aSIdo Barnea    notice, this list of conditions and the following disclaimer in the
14a551c94aSIdo Barnea    documentation and/or other materials provided with the distribution.
15a551c94aSIdo Barnea
16a551c94aSIdo Barnea 3. Neither the name of the Intel Corporation nor the names of its
17a551c94aSIdo Barnea    contributors may be used to endorse or promote products derived from
18a551c94aSIdo Barnea    this software without specific prior written permission.
19a551c94aSIdo Barnea
20a551c94aSIdo BarneaTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21a551c94aSIdo BarneaAND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22a551c94aSIdo BarneaIMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23a551c94aSIdo BarneaARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24a551c94aSIdo BarneaLIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25a551c94aSIdo BarneaCONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26a551c94aSIdo BarneaSUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27a551c94aSIdo BarneaINTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28a551c94aSIdo BarneaCONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29a551c94aSIdo BarneaARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30a551c94aSIdo BarneaPOSSIBILITY OF SUCH DAMAGE.
31a551c94aSIdo Barnea
32a551c94aSIdo Barnea***************************************************************************/
33a551c94aSIdo Barnea
34a551c94aSIdo Barnea
35a551c94aSIdo Barnea#include "e1000_api.h"
36a551c94aSIdo Barnea
37a551c94aSIdo Barnea
38a551c94aSIdo BarneaSTATIC s32 e1000_init_phy_params_vf(struct e1000_hw *hw);
39a551c94aSIdo BarneaSTATIC s32 e1000_init_nvm_params_vf(struct e1000_hw *hw);
40a551c94aSIdo BarneaSTATIC void e1000_release_vf(struct e1000_hw *hw);
41a551c94aSIdo BarneaSTATIC s32 e1000_acquire_vf(struct e1000_hw *hw);
42a551c94aSIdo BarneaSTATIC s32 e1000_setup_link_vf(struct e1000_hw *hw);
43a551c94aSIdo BarneaSTATIC s32 e1000_get_bus_info_pcie_vf(struct e1000_hw *hw);
44a551c94aSIdo BarneaSTATIC s32 e1000_init_mac_params_vf(struct e1000_hw *hw);
45a551c94aSIdo BarneaSTATIC s32 e1000_check_for_link_vf(struct e1000_hw *hw);
46a551c94aSIdo BarneaSTATIC s32 e1000_get_link_up_info_vf(struct e1000_hw *hw, u16 *speed,
47a551c94aSIdo Barnea				     u16 *duplex);
48a551c94aSIdo BarneaSTATIC s32 e1000_init_hw_vf(struct e1000_hw *hw);
49a551c94aSIdo BarneaSTATIC s32 e1000_reset_hw_vf(struct e1000_hw *hw);
50a551c94aSIdo BarneaSTATIC void e1000_update_mc_addr_list_vf(struct e1000_hw *hw, u8 *, u32);
51a551c94aSIdo BarneaSTATIC int  e1000_rar_set_vf(struct e1000_hw *, u8 *, u32);
52a551c94aSIdo BarneaSTATIC s32 e1000_read_mac_addr_vf(struct e1000_hw *);
53a551c94aSIdo Barnea
54a551c94aSIdo Barnea/**
55a551c94aSIdo Barnea *  e1000_init_phy_params_vf - Inits PHY params
56a551c94aSIdo Barnea *  @hw: pointer to the HW structure
57a551c94aSIdo Barnea *
58a551c94aSIdo Barnea *  Doesn't do much - there's no PHY available to the VF.
59a551c94aSIdo Barnea **/
60a551c94aSIdo BarneaSTATIC s32 e1000_init_phy_params_vf(struct e1000_hw *hw)
61a551c94aSIdo Barnea{
62a551c94aSIdo Barnea	DEBUGFUNC("e1000_init_phy_params_vf");
63a551c94aSIdo Barnea	hw->phy.type = e1000_phy_vf;
64a551c94aSIdo Barnea	hw->phy.ops.acquire = e1000_acquire_vf;
65a551c94aSIdo Barnea	hw->phy.ops.release = e1000_release_vf;
66a551c94aSIdo Barnea
67a551c94aSIdo Barnea	return E1000_SUCCESS;
68a551c94aSIdo Barnea}
69a551c94aSIdo Barnea
70a551c94aSIdo Barnea/**
71a551c94aSIdo Barnea *  e1000_init_nvm_params_vf - Inits NVM params
72a551c94aSIdo Barnea *  @hw: pointer to the HW structure
73a551c94aSIdo Barnea *
74a551c94aSIdo Barnea *  Doesn't do much - there's no NVM available to the VF.
75a551c94aSIdo Barnea **/
76a551c94aSIdo BarneaSTATIC s32 e1000_init_nvm_params_vf(struct e1000_hw *hw)
77a551c94aSIdo Barnea{
78a551c94aSIdo Barnea	DEBUGFUNC("e1000_init_nvm_params_vf");
79a551c94aSIdo Barnea	hw->nvm.type = e1000_nvm_none;
80a551c94aSIdo Barnea	hw->nvm.ops.acquire = e1000_acquire_vf;
81a551c94aSIdo Barnea	hw->nvm.ops.release = e1000_release_vf;
82a551c94aSIdo Barnea
83a551c94aSIdo Barnea	return E1000_SUCCESS;
84a551c94aSIdo Barnea}
85a551c94aSIdo Barnea
86a551c94aSIdo Barnea/**
87a551c94aSIdo Barnea *  e1000_init_mac_params_vf - Inits MAC params
88a551c94aSIdo Barnea *  @hw: pointer to the HW structure
89a551c94aSIdo Barnea **/
90a551c94aSIdo BarneaSTATIC s32 e1000_init_mac_params_vf(struct e1000_hw *hw)
91a551c94aSIdo Barnea{
92a551c94aSIdo Barnea	struct e1000_mac_info *mac = &hw->mac;
93a551c94aSIdo Barnea
94a551c94aSIdo Barnea	DEBUGFUNC("e1000_init_mac_params_vf");
95a551c94aSIdo Barnea
96a551c94aSIdo Barnea	/* Set media type */
97a551c94aSIdo Barnea	/*
98a551c94aSIdo Barnea	 * Virtual functions don't care what they're media type is as they
99a551c94aSIdo Barnea	 * have no direct access to the PHY, or the media.  That is handled
100a551c94aSIdo Barnea	 * by the physical function driver.
101a551c94aSIdo Barnea	 */
102a551c94aSIdo Barnea	hw->phy.media_type = e1000_media_type_unknown;
103a551c94aSIdo Barnea
104a551c94aSIdo Barnea	/* No ASF features for the VF driver */
105a551c94aSIdo Barnea	mac->asf_firmware_present = false;
106a551c94aSIdo Barnea	/* ARC subsystem not supported */
107a551c94aSIdo Barnea	mac->arc_subsystem_valid = false;
108a551c94aSIdo Barnea	/* Disable adaptive IFS mode so the generic funcs don't do anything */
109a551c94aSIdo Barnea	mac->adaptive_ifs = false;
110a551c94aSIdo Barnea	/* VF's have no MTA Registers - PF feature only */
111a551c94aSIdo Barnea	mac->mta_reg_count = 128;
112a551c94aSIdo Barnea	/* VF's have no access to RAR entries  */
113a551c94aSIdo Barnea	mac->rar_entry_count = 1;
114a551c94aSIdo Barnea
115a551c94aSIdo Barnea	/* Function pointers */
116a551c94aSIdo Barnea	/* link setup */
117a551c94aSIdo Barnea	mac->ops.setup_link = e1000_setup_link_vf;
118a551c94aSIdo Barnea	/* bus type/speed/width */
119a551c94aSIdo Barnea	mac->ops.get_bus_info = e1000_get_bus_info_pcie_vf;
120a551c94aSIdo Barnea	/* reset */
121a551c94aSIdo Barnea	mac->ops.reset_hw = e1000_reset_hw_vf;
122a551c94aSIdo Barnea	/* hw initialization */
123a551c94aSIdo Barnea	mac->ops.init_hw = e1000_init_hw_vf;
124a551c94aSIdo Barnea	/* check for link */
125a551c94aSIdo Barnea	mac->ops.check_for_link = e1000_check_for_link_vf;
126a551c94aSIdo Barnea	/* link info */
127a551c94aSIdo Barnea	mac->ops.get_link_up_info = e1000_get_link_up_info_vf;
128a551c94aSIdo Barnea	/* multicast address update */
129a551c94aSIdo Barnea	mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_vf;
130a551c94aSIdo Barnea	/* set mac address */
131a551c94aSIdo Barnea	mac->ops.rar_set = e1000_rar_set_vf;
132a551c94aSIdo Barnea	/* read mac address */
133a551c94aSIdo Barnea	mac->ops.read_mac_addr = e1000_read_mac_addr_vf;
134a551c94aSIdo Barnea
135a551c94aSIdo Barnea
136a551c94aSIdo Barnea	return E1000_SUCCESS;
137a551c94aSIdo Barnea}
138a551c94aSIdo Barnea
139a551c94aSIdo Barnea/**
140a551c94aSIdo Barnea *  e1000_init_function_pointers_vf - Inits function pointers
141a551c94aSIdo Barnea *  @hw: pointer to the HW structure
142a551c94aSIdo Barnea **/
143a551c94aSIdo Barneavoid e1000_init_function_pointers_vf(struct e1000_hw *hw)
144a551c94aSIdo Barnea{
145a551c94aSIdo Barnea	DEBUGFUNC("e1000_init_function_pointers_vf");
146a551c94aSIdo Barnea
147a551c94aSIdo Barnea	hw->mac.ops.init_params = e1000_init_mac_params_vf;
148a551c94aSIdo Barnea	hw->nvm.ops.init_params = e1000_init_nvm_params_vf;
149a551c94aSIdo Barnea	hw->phy.ops.init_params = e1000_init_phy_params_vf;
150a551c94aSIdo Barnea	hw->mbx.ops.init_params = e1000_init_mbx_params_vf;
151a551c94aSIdo Barnea}
152a551c94aSIdo Barnea
153a551c94aSIdo Barnea/**
154a551c94aSIdo Barnea *  e1000_acquire_vf - Acquire rights to access PHY or NVM.
155a551c94aSIdo Barnea *  @hw: pointer to the HW structure
156a551c94aSIdo Barnea *
157a551c94aSIdo Barnea *  There is no PHY or NVM so we want all attempts to acquire these to fail.
158a551c94aSIdo Barnea *  In addition, the MAC registers to access PHY/NVM don't exist so we don't
159a551c94aSIdo Barnea *  even want any SW to attempt to use them.
160a551c94aSIdo Barnea **/
161a551c94aSIdo BarneaSTATIC s32 e1000_acquire_vf(struct e1000_hw E1000_UNUSEDARG *hw)
162a551c94aSIdo Barnea{
163a551c94aSIdo Barnea	UNREFERENCED_1PARAMETER(hw);
164a551c94aSIdo Barnea	return -E1000_ERR_PHY;
165a551c94aSIdo Barnea}
166a551c94aSIdo Barnea
167a551c94aSIdo Barnea/**
168a551c94aSIdo Barnea *  e1000_release_vf - Release PHY or NVM
169a551c94aSIdo Barnea *  @hw: pointer to the HW structure
170a551c94aSIdo Barnea *
171a551c94aSIdo Barnea *  There is no PHY or NVM so we want all attempts to acquire these to fail.
172a551c94aSIdo Barnea *  In addition, the MAC registers to access PHY/NVM don't exist so we don't
173a551c94aSIdo Barnea *  even want any SW to attempt to use them.
174a551c94aSIdo Barnea **/
175a551c94aSIdo BarneaSTATIC void e1000_release_vf(struct e1000_hw E1000_UNUSEDARG *hw)
176a551c94aSIdo Barnea{
177a551c94aSIdo Barnea	UNREFERENCED_1PARAMETER(hw);
178a551c94aSIdo Barnea	return;
179a551c94aSIdo Barnea}
180a551c94aSIdo Barnea
181a551c94aSIdo Barnea/**
182a551c94aSIdo Barnea *  e1000_setup_link_vf - Sets up link.
183a551c94aSIdo Barnea *  @hw: pointer to the HW structure
184a551c94aSIdo Barnea *
185a551c94aSIdo Barnea *  Virtual functions cannot change link.
186a551c94aSIdo Barnea **/
187a551c94aSIdo BarneaSTATIC s32 e1000_setup_link_vf(struct e1000_hw E1000_UNUSEDARG *hw)
188a551c94aSIdo Barnea{
189a551c94aSIdo Barnea	DEBUGFUNC("e1000_setup_link_vf");
190a551c94aSIdo Barnea	UNREFERENCED_1PARAMETER(hw);
191a551c94aSIdo Barnea
192a551c94aSIdo Barnea	return E1000_SUCCESS;
193a551c94aSIdo Barnea}
194a551c94aSIdo Barnea
195a551c94aSIdo Barnea/**
196a551c94aSIdo Barnea *  e1000_get_bus_info_pcie_vf - Gets the bus info.
197a551c94aSIdo Barnea *  @hw: pointer to the HW structure
198a551c94aSIdo Barnea *
199a551c94aSIdo Barnea *  Virtual functions are not really on their own bus.
200a551c94aSIdo Barnea **/
201a551c94aSIdo BarneaSTATIC s32 e1000_get_bus_info_pcie_vf(struct e1000_hw *hw)
202a551c94aSIdo Barnea{
203a551c94aSIdo Barnea	struct e1000_bus_info *bus = &hw->bus;
204a551c94aSIdo Barnea
205a551c94aSIdo Barnea	DEBUGFUNC("e1000_get_bus_info_pcie_vf");
206a551c94aSIdo Barnea
207a551c94aSIdo Barnea	/* Do not set type PCI-E because we don't want disable master to run */
208a551c94aSIdo Barnea	bus->type = e1000_bus_type_reserved;
209a551c94aSIdo Barnea	bus->speed = e1000_bus_speed_2500;
210a551c94aSIdo Barnea
211a551c94aSIdo Barnea	return 0;
212a551c94aSIdo Barnea}
213a551c94aSIdo Barnea
214a551c94aSIdo Barnea/**
215a551c94aSIdo Barnea *  e1000_get_link_up_info_vf - Gets link info.
216a551c94aSIdo Barnea *  @hw: pointer to the HW structure
217a551c94aSIdo Barnea *  @speed: pointer to 16 bit value to store link speed.
218a551c94aSIdo Barnea *  @duplex: pointer to 16 bit value to store duplex.
219a551c94aSIdo Barnea *
220a551c94aSIdo Barnea *  Since we cannot read the PHY and get accurate link info, we must rely upon
221a551c94aSIdo Barnea *  the status register's data which is often stale and inaccurate.
222a551c94aSIdo Barnea **/
223a551c94aSIdo BarneaSTATIC s32 e1000_get_link_up_info_vf(struct e1000_hw *hw, u16 *speed,
224a551c94aSIdo Barnea				     u16 *duplex)
225a551c94aSIdo Barnea{
226a551c94aSIdo Barnea	s32 status;
227a551c94aSIdo Barnea
228a551c94aSIdo Barnea	DEBUGFUNC("e1000_get_link_up_info_vf");
229a551c94aSIdo Barnea
230a551c94aSIdo Barnea	status = E1000_READ_REG(hw, E1000_STATUS);
231a551c94aSIdo Barnea	if (status & E1000_STATUS_SPEED_1000) {
232a551c94aSIdo Barnea		*speed = SPEED_1000;
233a551c94aSIdo Barnea		DEBUGOUT("1000 Mbs, ");
234a551c94aSIdo Barnea	} else if (status & E1000_STATUS_SPEED_100) {
235a551c94aSIdo Barnea		*speed = SPEED_100;
236a551c94aSIdo Barnea		DEBUGOUT("100 Mbs, ");
237a551c94aSIdo Barnea	} else {
238a551c94aSIdo Barnea		*speed = SPEED_10;
239a551c94aSIdo Barnea		DEBUGOUT("10 Mbs, ");
240a551c94aSIdo Barnea	}
241a551c94aSIdo Barnea
242a551c94aSIdo Barnea	if (status & E1000_STATUS_FD) {
243a551c94aSIdo Barnea		*duplex = FULL_DUPLEX;
244a551c94aSIdo Barnea		DEBUGOUT("Full Duplex\n");
245a551c94aSIdo Barnea	} else {
246a551c94aSIdo Barnea		*duplex = HALF_DUPLEX;
247a551c94aSIdo Barnea		DEBUGOUT("Half Duplex\n");
248a551c94aSIdo Barnea	}
249a551c94aSIdo Barnea
250a551c94aSIdo Barnea	return E1000_SUCCESS;
251a551c94aSIdo Barnea}
252a551c94aSIdo Barnea
253a551c94aSIdo Barnea/**
254a551c94aSIdo Barnea *  e1000_reset_hw_vf - Resets the HW
255a551c94aSIdo Barnea *  @hw: pointer to the HW structure
256a551c94aSIdo Barnea *
257a551c94aSIdo Barnea *  VF's provide a function level reset. This is done using bit 26 of ctrl_reg.
258a551c94aSIdo Barnea *  This is all the reset we can perform on a VF.
259a551c94aSIdo Barnea **/
260a551c94aSIdo BarneaSTATIC s32 e1000_reset_hw_vf(struct e1000_hw *hw)
261a551c94aSIdo Barnea{
262a551c94aSIdo Barnea	struct e1000_mbx_info *mbx = &hw->mbx;
263a551c94aSIdo Barnea	u32 timeout = E1000_VF_INIT_TIMEOUT;
264a551c94aSIdo Barnea	s32 ret_val = -E1000_ERR_MAC_INIT;
265a551c94aSIdo Barnea	u32 ctrl, msgbuf[3];
266a551c94aSIdo Barnea	u8 *addr = (u8 *)(&msgbuf[1]);
267a551c94aSIdo Barnea
268a551c94aSIdo Barnea	DEBUGFUNC("e1000_reset_hw_vf");
269a551c94aSIdo Barnea
270a551c94aSIdo Barnea	DEBUGOUT("Issuing a function level reset to MAC\n");
271a551c94aSIdo Barnea	ctrl = E1000_READ_REG(hw, E1000_CTRL);
272a551c94aSIdo Barnea	E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_RST);
273a551c94aSIdo Barnea
274a551c94aSIdo Barnea	/* we cannot reset while the RSTI / RSTD bits are asserted */
275a551c94aSIdo Barnea	while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
276a551c94aSIdo Barnea		timeout--;
277a551c94aSIdo Barnea		usec_delay(5);
278a551c94aSIdo Barnea	}
279a551c94aSIdo Barnea
280a551c94aSIdo Barnea	if (timeout) {
281a551c94aSIdo Barnea		/* mailbox timeout can now become active */
282a551c94aSIdo Barnea		mbx->timeout = E1000_VF_MBX_INIT_TIMEOUT;
283a551c94aSIdo Barnea
284a551c94aSIdo Barnea		msgbuf[0] = E1000_VF_RESET;
285a551c94aSIdo Barnea		mbx->ops.write_posted(hw, msgbuf, 1, 0);
286a551c94aSIdo Barnea
287a551c94aSIdo Barnea		msec_delay(10);
288a551c94aSIdo Barnea
289a551c94aSIdo Barnea		/* set our "perm_addr" based on info provided by PF */
290a551c94aSIdo Barnea		ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
291a551c94aSIdo Barnea		if (!ret_val) {
292a551c94aSIdo Barnea			if (msgbuf[0] == (E1000_VF_RESET |
293a551c94aSIdo Barnea			    E1000_VT_MSGTYPE_ACK))
294a551c94aSIdo Barnea				memcpy(hw->mac.perm_addr, addr, 6);
295a551c94aSIdo Barnea			else
296a551c94aSIdo Barnea				ret_val = -E1000_ERR_MAC_INIT;
297a551c94aSIdo Barnea		}
298a551c94aSIdo Barnea	}
299a551c94aSIdo Barnea
300a551c94aSIdo Barnea	return ret_val;
301a551c94aSIdo Barnea}
302a551c94aSIdo Barnea
303a551c94aSIdo Barnea/**
304a551c94aSIdo Barnea *  e1000_init_hw_vf - Inits the HW
305a551c94aSIdo Barnea *  @hw: pointer to the HW structure
306a551c94aSIdo Barnea *
307a551c94aSIdo Barnea *  Not much to do here except clear the PF Reset indication if there is one.
308a551c94aSIdo Barnea **/
309a551c94aSIdo BarneaSTATIC s32 e1000_init_hw_vf(struct e1000_hw *hw)
310a551c94aSIdo Barnea{
311a551c94aSIdo Barnea	DEBUGFUNC("e1000_init_hw_vf");
312a551c94aSIdo Barnea
313a551c94aSIdo Barnea	/* attempt to set and restore our mac address */
314a551c94aSIdo Barnea	e1000_rar_set_vf(hw, hw->mac.addr, 0);
315a551c94aSIdo Barnea
316a551c94aSIdo Barnea	return E1000_SUCCESS;
317a551c94aSIdo Barnea}
318a551c94aSIdo Barnea
319a551c94aSIdo Barnea/**
320a551c94aSIdo Barnea *  e1000_rar_set_vf - set device MAC address
321a551c94aSIdo Barnea *  @hw: pointer to the HW structure
322a551c94aSIdo Barnea *  @addr: pointer to the receive address
323a551c94aSIdo Barnea *  @index receive address array register
324a551c94aSIdo Barnea **/
325a551c94aSIdo BarneaSTATIC int e1000_rar_set_vf(struct e1000_hw *hw, u8 *addr,
326a551c94aSIdo Barnea			     u32 E1000_UNUSEDARG index)
327a551c94aSIdo Barnea{
328a551c94aSIdo Barnea	struct e1000_mbx_info *mbx = &hw->mbx;
329a551c94aSIdo Barnea	u32 msgbuf[3];
330a551c94aSIdo Barnea	u8 *msg_addr = (u8 *)(&msgbuf[1]);
331a551c94aSIdo Barnea	s32 ret_val;
332a551c94aSIdo Barnea
333a551c94aSIdo Barnea	UNREFERENCED_1PARAMETER(index);
334a551c94aSIdo Barnea	memset(msgbuf, 0, 12);
335a551c94aSIdo Barnea	msgbuf[0] = E1000_VF_SET_MAC_ADDR;
336a551c94aSIdo Barnea	memcpy(msg_addr, addr, 6);
337a551c94aSIdo Barnea	ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
338a551c94aSIdo Barnea
339a551c94aSIdo Barnea	if (!ret_val)
340a551c94aSIdo Barnea		ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
341a551c94aSIdo Barnea
342a551c94aSIdo Barnea	msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
343a551c94aSIdo Barnea
344a551c94aSIdo Barnea	/* if nacked the address was rejected, use "perm_addr" */
345a551c94aSIdo Barnea	if (!ret_val &&
346a551c94aSIdo Barnea	    (msgbuf[0] == (E1000_VF_SET_MAC_ADDR | E1000_VT_MSGTYPE_NACK)))
347a551c94aSIdo Barnea		e1000_read_mac_addr_vf(hw);
348a551c94aSIdo Barnea
349a551c94aSIdo Barnea	return E1000_SUCCESS;
350a551c94aSIdo Barnea}
351a551c94aSIdo Barnea
352a551c94aSIdo Barnea/**
353a551c94aSIdo Barnea *  e1000_hash_mc_addr_vf - Generate a multicast hash value
354a551c94aSIdo Barnea *  @hw: pointer to the HW structure
355a551c94aSIdo Barnea *  @mc_addr: pointer to a multicast address
356a551c94aSIdo Barnea *
357a551c94aSIdo Barnea *  Generates a multicast address hash value which is used to determine
358a551c94aSIdo Barnea *  the multicast filter table array address and new table value.
359a551c94aSIdo Barnea **/
360a551c94aSIdo BarneaSTATIC u32 e1000_hash_mc_addr_vf(struct e1000_hw *hw, u8 *mc_addr)
361a551c94aSIdo Barnea{
362a551c94aSIdo Barnea	u32 hash_value, hash_mask;
363a551c94aSIdo Barnea	u8 bit_shift = 0;
364a551c94aSIdo Barnea
365a551c94aSIdo Barnea	DEBUGFUNC("e1000_hash_mc_addr_generic");
366a551c94aSIdo Barnea
367a551c94aSIdo Barnea	/* Register count multiplied by bits per register */
368a551c94aSIdo Barnea	hash_mask = (hw->mac.mta_reg_count * 32) - 1;
369a551c94aSIdo Barnea
370a551c94aSIdo Barnea	/*
371a551c94aSIdo Barnea	 * The bit_shift is the number of left-shifts
372a551c94aSIdo Barnea	 * where 0xFF would still fall within the hash mask.
373a551c94aSIdo Barnea	 */
374a551c94aSIdo Barnea	while (hash_mask >> bit_shift != 0xFF)
375a551c94aSIdo Barnea		bit_shift++;
376a551c94aSIdo Barnea
377a551c94aSIdo Barnea	hash_value = hash_mask & (((mc_addr[4] >> (8 - bit_shift)) |
378a551c94aSIdo Barnea				  (((u16) mc_addr[5]) << bit_shift)));
379a551c94aSIdo Barnea
380a551c94aSIdo Barnea	return hash_value;
381a551c94aSIdo Barnea}
382a551c94aSIdo Barnea
383a551c94aSIdo BarneaSTATIC void e1000_write_msg_read_ack(struct e1000_hw *hw,
384a551c94aSIdo Barnea				     u32 *msg, u16 size)
385a551c94aSIdo Barnea{
386a551c94aSIdo Barnea	struct e1000_mbx_info *mbx = &hw->mbx;
387a551c94aSIdo Barnea	u32 retmsg[E1000_VFMAILBOX_SIZE];
388a551c94aSIdo Barnea	s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
389a551c94aSIdo Barnea
390a551c94aSIdo Barnea	if (!retval)
391a551c94aSIdo Barnea		mbx->ops.read_posted(hw, retmsg, E1000_VFMAILBOX_SIZE, 0);
392a551c94aSIdo Barnea}
393a551c94aSIdo Barnea
394a551c94aSIdo Barnea/**
395a551c94aSIdo Barnea *  e1000_update_mc_addr_list_vf - Update Multicast addresses
396a551c94aSIdo Barnea *  @hw: pointer to the HW structure
397a551c94aSIdo Barnea *  @mc_addr_list: array of multicast addresses to program
398a551c94aSIdo Barnea *  @mc_addr_count: number of multicast addresses to program
399a551c94aSIdo Barnea *
400a551c94aSIdo Barnea *  Updates the Multicast Table Array.
401a551c94aSIdo Barnea *  The caller must have a packed mc_addr_list of multicast addresses.
402a551c94aSIdo Barnea **/
403a551c94aSIdo Barneavoid e1000_update_mc_addr_list_vf(struct e1000_hw *hw,
404a551c94aSIdo Barnea				  u8 *mc_addr_list, u32 mc_addr_count)
405a551c94aSIdo Barnea{
406a551c94aSIdo Barnea	u32 msgbuf[E1000_VFMAILBOX_SIZE];
407a551c94aSIdo Barnea	u16 *hash_list = (u16 *)&msgbuf[1];
408a551c94aSIdo Barnea	u32 hash_value;
409a551c94aSIdo Barnea	u32 i;
410a551c94aSIdo Barnea
411a551c94aSIdo Barnea	DEBUGFUNC("e1000_update_mc_addr_list_vf");
412a551c94aSIdo Barnea
413a551c94aSIdo Barnea	/* Each entry in the list uses 1 16 bit word.  We have 30
414a551c94aSIdo Barnea	 * 16 bit words available in our HW msg buffer (minus 1 for the
415a551c94aSIdo Barnea	 * msg type).  That's 30 hash values if we pack 'em right.  If
416a551c94aSIdo Barnea	 * there are more than 30 MC addresses to add then punt the
417a551c94aSIdo Barnea	 * extras for now and then add code to handle more than 30 later.
418a551c94aSIdo Barnea	 * It would be unusual for a server to request that many multi-cast
419a551c94aSIdo Barnea	 * addresses except for in large enterprise network environments.
420a551c94aSIdo Barnea	 */
421a551c94aSIdo Barnea
422a551c94aSIdo Barnea	DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
423a551c94aSIdo Barnea
424a551c94aSIdo Barnea	if (mc_addr_count > 30) {
425a551c94aSIdo Barnea		msgbuf[0] |= E1000_VF_SET_MULTICAST_OVERFLOW;
426a551c94aSIdo Barnea		mc_addr_count = 30;
427a551c94aSIdo Barnea	}
428a551c94aSIdo Barnea
429a551c94aSIdo Barnea	msgbuf[0] = E1000_VF_SET_MULTICAST;
430a551c94aSIdo Barnea	msgbuf[0] |= mc_addr_count << E1000_VT_MSGINFO_SHIFT;
431a551c94aSIdo Barnea
432a551c94aSIdo Barnea	for (i = 0; i < mc_addr_count; i++) {
433a551c94aSIdo Barnea		hash_value = e1000_hash_mc_addr_vf(hw, mc_addr_list);
434a551c94aSIdo Barnea		DEBUGOUT1("Hash value = 0x%03X\n", hash_value);
435a551c94aSIdo Barnea		hash_list[i] = hash_value & 0x0FFF;
436a551c94aSIdo Barnea		mc_addr_list += ETH_ADDR_LEN;
437a551c94aSIdo Barnea	}
438a551c94aSIdo Barnea
439a551c94aSIdo Barnea	e1000_write_msg_read_ack(hw, msgbuf, E1000_VFMAILBOX_SIZE);
440a551c94aSIdo Barnea}
441a551c94aSIdo Barnea
442a551c94aSIdo Barnea/**
443a551c94aSIdo Barnea *  e1000_vfta_set_vf - Set/Unset vlan filter table address
444a551c94aSIdo Barnea *  @hw: pointer to the HW structure
445a551c94aSIdo Barnea *  @vid: determines the vfta register and bit to set/unset
446a551c94aSIdo Barnea *  @set: if true then set bit, else clear bit
447a551c94aSIdo Barnea **/
448a551c94aSIdo Barneavoid e1000_vfta_set_vf(struct e1000_hw *hw, u16 vid, bool set)
449a551c94aSIdo Barnea{
450a551c94aSIdo Barnea	u32 msgbuf[2];
451a551c94aSIdo Barnea
452a551c94aSIdo Barnea	msgbuf[0] = E1000_VF_SET_VLAN;
453a551c94aSIdo Barnea	msgbuf[1] = vid;
454a551c94aSIdo Barnea	/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
455a551c94aSIdo Barnea	if (set)
456a551c94aSIdo Barnea		msgbuf[0] |= E1000_VF_SET_VLAN_ADD;
457a551c94aSIdo Barnea
458a551c94aSIdo Barnea	e1000_write_msg_read_ack(hw, msgbuf, 2);
459a551c94aSIdo Barnea}
460a551c94aSIdo Barnea
461a551c94aSIdo Barnea/** e1000_rlpml_set_vf - Set the maximum receive packet length
462a551c94aSIdo Barnea *  @hw: pointer to the HW structure
463a551c94aSIdo Barnea *  @max_size: value to assign to max frame size
464a551c94aSIdo Barnea **/
465a551c94aSIdo Barneavoid e1000_rlpml_set_vf(struct e1000_hw *hw, u16 max_size)
466a551c94aSIdo Barnea{
467a551c94aSIdo Barnea	u32 msgbuf[2];
468a551c94aSIdo Barnea
469a551c94aSIdo Barnea	msgbuf[0] = E1000_VF_SET_LPE;
470a551c94aSIdo Barnea	msgbuf[1] = max_size;
471a551c94aSIdo Barnea
472a551c94aSIdo Barnea	e1000_write_msg_read_ack(hw, msgbuf, 2);
473a551c94aSIdo Barnea}
474a551c94aSIdo Barnea
475a551c94aSIdo Barnea/**
476a551c94aSIdo Barnea *  e1000_promisc_set_vf - Set flags for Unicast or Multicast promisc
477a551c94aSIdo Barnea *  @hw: pointer to the HW structure
478a551c94aSIdo Barnea *  @uni: boolean indicating unicast promisc status
479a551c94aSIdo Barnea *  @multi: boolean indicating multicast promisc status
480a551c94aSIdo Barnea **/
481a551c94aSIdo Barneas32 e1000_promisc_set_vf(struct e1000_hw *hw, enum e1000_promisc_type type)
482a551c94aSIdo Barnea{
483a551c94aSIdo Barnea	struct e1000_mbx_info *mbx = &hw->mbx;
484a551c94aSIdo Barnea	u32 msgbuf = E1000_VF_SET_PROMISC;
485a551c94aSIdo Barnea	s32 ret_val;
486a551c94aSIdo Barnea
487a551c94aSIdo Barnea	switch (type) {
488a551c94aSIdo Barnea	case e1000_promisc_multicast:
489a551c94aSIdo Barnea		msgbuf |= E1000_VF_SET_PROMISC_MULTICAST;
490a551c94aSIdo Barnea		break;
491a551c94aSIdo Barnea	case e1000_promisc_enabled:
492a551c94aSIdo Barnea		msgbuf |= E1000_VF_SET_PROMISC_MULTICAST;
493a551c94aSIdo Barnea	case e1000_promisc_unicast:
494a551c94aSIdo Barnea		msgbuf |= E1000_VF_SET_PROMISC_UNICAST;
495a551c94aSIdo Barnea	case e1000_promisc_disabled:
496a551c94aSIdo Barnea		break;
497a551c94aSIdo Barnea	default:
498a551c94aSIdo Barnea		return -E1000_ERR_MAC_INIT;
499a551c94aSIdo Barnea	}
500a551c94aSIdo Barnea
501a551c94aSIdo Barnea	 ret_val = mbx->ops.write_posted(hw, &msgbuf, 1, 0);
502a551c94aSIdo Barnea
503a551c94aSIdo Barnea	if (!ret_val)
504a551c94aSIdo Barnea		ret_val = mbx->ops.read_posted(hw, &msgbuf, 1, 0);
505a551c94aSIdo Barnea
506a551c94aSIdo Barnea	if (!ret_val && !(msgbuf & E1000_VT_MSGTYPE_ACK))
507a551c94aSIdo Barnea		ret_val = -E1000_ERR_MAC_INIT;
508a551c94aSIdo Barnea
509a551c94aSIdo Barnea	return ret_val;
510a551c94aSIdo Barnea}
511a551c94aSIdo Barnea
512a551c94aSIdo Barnea/**
513a551c94aSIdo Barnea *  e1000_read_mac_addr_vf - Read device MAC address
514a551c94aSIdo Barnea *  @hw: pointer to the HW structure
515a551c94aSIdo Barnea **/
516a551c94aSIdo BarneaSTATIC s32 e1000_read_mac_addr_vf(struct e1000_hw *hw)
517a551c94aSIdo Barnea{
518a551c94aSIdo Barnea	int i;
519a551c94aSIdo Barnea
520a551c94aSIdo Barnea	for (i = 0; i < ETH_ADDR_LEN; i++)
521a551c94aSIdo Barnea		hw->mac.addr[i] = hw->mac.perm_addr[i];
522a551c94aSIdo Barnea
523a551c94aSIdo Barnea	return E1000_SUCCESS;
524a551c94aSIdo Barnea}
525a551c94aSIdo Barnea
526a551c94aSIdo Barnea/**
527a551c94aSIdo Barnea *  e1000_check_for_link_vf - Check for link for a virtual interface
528a551c94aSIdo Barnea *  @hw: pointer to the HW structure
529a551c94aSIdo Barnea *
530a551c94aSIdo Barnea *  Checks to see if the underlying PF is still talking to the VF and
531a551c94aSIdo Barnea *  if it is then it reports the link state to the hardware, otherwise
532a551c94aSIdo Barnea *  it reports link down and returns an error.
533a551c94aSIdo Barnea **/
534a551c94aSIdo BarneaSTATIC s32 e1000_check_for_link_vf(struct e1000_hw *hw)
535a551c94aSIdo Barnea{
536a551c94aSIdo Barnea	struct e1000_mbx_info *mbx = &hw->mbx;
537a551c94aSIdo Barnea	struct e1000_mac_info *mac = &hw->mac;
538a551c94aSIdo Barnea	s32 ret_val = E1000_SUCCESS;
539a551c94aSIdo Barnea	u32 in_msg = 0;
540a551c94aSIdo Barnea
541a551c94aSIdo Barnea	DEBUGFUNC("e1000_check_for_link_vf");
542a551c94aSIdo Barnea
543a551c94aSIdo Barnea	/*
544a551c94aSIdo Barnea	 * We only want to run this if there has been a rst asserted.
545a551c94aSIdo Barnea	 * in this case that could mean a link change, device reset,
546a551c94aSIdo Barnea	 * or a virtual function reset
547a551c94aSIdo Barnea	 */
548a551c94aSIdo Barnea
549a551c94aSIdo Barnea	/* If we were hit with a reset or timeout drop the link */
550a551c94aSIdo Barnea	if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
551a551c94aSIdo Barnea		mac->get_link_status = true;
552a551c94aSIdo Barnea
553a551c94aSIdo Barnea	if (!mac->get_link_status)
554a551c94aSIdo Barnea		goto out;
555a551c94aSIdo Barnea
556a551c94aSIdo Barnea	/* if link status is down no point in checking to see if pf is up */
557a551c94aSIdo Barnea	if (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU))
558a551c94aSIdo Barnea		goto out;
559a551c94aSIdo Barnea
560a551c94aSIdo Barnea	/* if the read failed it could just be a mailbox collision, best wait
561a551c94aSIdo Barnea	 * until we are called again and don't report an error */
562a551c94aSIdo Barnea	if (mbx->ops.read(hw, &in_msg, 1, 0))
563a551c94aSIdo Barnea		goto out;
564a551c94aSIdo Barnea
565a551c94aSIdo Barnea	/* if incoming message isn't clear to send we are waiting on response */
566a551c94aSIdo Barnea	if (!(in_msg & E1000_VT_MSGTYPE_CTS)) {
567a551c94aSIdo Barnea		/* message is not CTS and is NACK we have lost CTS status */
568a551c94aSIdo Barnea		if (in_msg & E1000_VT_MSGTYPE_NACK)
569a551c94aSIdo Barnea			ret_val = -E1000_ERR_MAC_INIT;
570a551c94aSIdo Barnea		goto out;
571a551c94aSIdo Barnea	}
572a551c94aSIdo Barnea
573a551c94aSIdo Barnea	/* at this point we know the PF is talking to us, check and see if
574a551c94aSIdo Barnea	 * we are still accepting timeout or if we had a timeout failure.
575a551c94aSIdo Barnea	 * if we failed then we will need to reinit */
576a551c94aSIdo Barnea	if (!mbx->timeout) {
577a551c94aSIdo Barnea		ret_val = -E1000_ERR_MAC_INIT;
578a551c94aSIdo Barnea		goto out;
579a551c94aSIdo Barnea	}
580a551c94aSIdo Barnea
581a551c94aSIdo Barnea	/* if we passed all the tests above then the link is up and we no
582a551c94aSIdo Barnea	 * longer need to check for link */
583a551c94aSIdo Barnea	mac->get_link_status = false;
584a551c94aSIdo Barnea
585a551c94aSIdo Barneaout:
586a551c94aSIdo Barnea	return ret_val;
587a551c94aSIdo Barnea}
588a551c94aSIdo Barnea
589