enic_main.c revision 27a705e4
1/*
2 * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4 *
5 * Copyright (c) 2014, Cisco Systems, Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 *
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
18 * distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35#include <stdio.h>
36
37#include <sys/stat.h>
38#include <sys/mman.h>
39#include <fcntl.h>
40#include <libgen.h>
41
42#include <rte_pci.h>
43#include <rte_memzone.h>
44#include <rte_malloc.h>
45#include <rte_mbuf.h>
46#include <rte_string_fns.h>
47#include <rte_ethdev.h>
48
49#include "enic_compat.h"
50#include "enic.h"
51#include "wq_enet_desc.h"
52#include "rq_enet_desc.h"
53#include "cq_enet_desc.h"
54#include "vnic_enet.h"
55#include "vnic_dev.h"
56#include "vnic_wq.h"
57#include "vnic_rq.h"
58#include "vnic_cq.h"
59#include "vnic_intr.h"
60#include "vnic_nic.h"
61
62static inline int enic_is_sriov_vf(struct enic *enic)
63{
64	return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
65}
66
67static int is_zero_addr(uint8_t *addr)
68{
69	return !(addr[0] |  addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
70}
71
72static int is_mcast_addr(uint8_t *addr)
73{
74	return addr[0] & 1;
75}
76
77static int is_eth_addr_valid(uint8_t *addr)
78{
79	return !is_mcast_addr(addr) && !is_zero_addr(addr);
80}
81
82static void
83enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
84{
85	uint16_t i;
86
87	if (!rq || !rq->mbuf_ring) {
88		dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
89		return;
90	}
91
92	for (i = 0; i < rq->ring.desc_count; i++) {
93		if (rq->mbuf_ring[i]) {
94			rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
95			rq->mbuf_ring[i] = NULL;
96		}
97	}
98}
99
100void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
101{
102	vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
103}
104
105static void enic_free_wq_buf(struct vnic_wq_buf *buf)
106{
107	struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
108
109	rte_pktmbuf_free_seg(mbuf);
110	buf->mb = NULL;
111}
112
113static void enic_log_q_error(struct enic *enic)
114{
115	unsigned int i;
116	u32 error_status;
117
118	for (i = 0; i < enic->wq_count; i++) {
119		error_status = vnic_wq_error_status(&enic->wq[i]);
120		if (error_status)
121			dev_err(enic, "WQ[%d] error_status %d\n", i,
122				error_status);
123	}
124
125	for (i = 0; i < enic_vnic_rq_count(enic); i++) {
126		if (!enic->rq[i].in_use)
127			continue;
128		error_status = vnic_rq_error_status(&enic->rq[i]);
129		if (error_status)
130			dev_err(enic, "RQ[%d] error_status %d\n", i,
131				error_status);
132	}
133}
134
135static void enic_clear_soft_stats(struct enic *enic)
136{
137	struct enic_soft_stats *soft_stats = &enic->soft_stats;
138	rte_atomic64_clear(&soft_stats->rx_nombuf);
139	rte_atomic64_clear(&soft_stats->rx_packet_errors);
140}
141
142static void enic_init_soft_stats(struct enic *enic)
143{
144	struct enic_soft_stats *soft_stats = &enic->soft_stats;
145	rte_atomic64_init(&soft_stats->rx_nombuf);
146	rte_atomic64_init(&soft_stats->rx_packet_errors);
147	enic_clear_soft_stats(enic);
148}
149
150void enic_dev_stats_clear(struct enic *enic)
151{
152	if (vnic_dev_stats_clear(enic->vdev))
153		dev_err(enic, "Error in clearing stats\n");
154	enic_clear_soft_stats(enic);
155}
156
157void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
158{
159	struct vnic_stats *stats;
160	struct enic_soft_stats *soft_stats = &enic->soft_stats;
161	int64_t rx_truncated;
162	uint64_t rx_packet_errors;
163
164	if (vnic_dev_stats_dump(enic->vdev, &stats)) {
165		dev_err(enic, "Error in getting stats\n");
166		return;
167	}
168
169
170	/* The number of truncated packets can only be calculated by
171	 * subtracting a hardware counter from error packets received by
172	 * the driver. Note: this causes transient inaccuracies in the
173	 * ipackets count. Also, the length of truncated packets are
174	 * counted in ibytes even though truncated packets are dropped
175	 * which can make ibytes be slightly higher than it should be.
176	 */
177	rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
178	rx_truncated = rx_packet_errors - stats->rx.rx_errors -
179		stats->rx.rx_no_bufs;
180
181	r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
182	r_stats->opackets = stats->tx.tx_frames_ok;
183
184	r_stats->ibytes = stats->rx.rx_unicast_bytes_ok+stats->rx.rx_multicast_bytes_ok+stats->rx.rx_broadcast_bytes_ok;
185	r_stats->obytes = stats->tx.tx_bytes_ok;
186
187	r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
188	r_stats->oerrors = stats->tx.tx_errors;
189
190	r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
191
192	r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
193}
194
195void enic_del_mac_address(struct enic *enic)
196{
197	if (vnic_dev_del_addr(enic->vdev, enic->mac_addr))
198		dev_err(enic, "del mac addr failed\n");
199}
200
201void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
202{
203	int err;
204
205	if (!is_eth_addr_valid(mac_addr)) {
206		dev_err(enic, "invalid mac address\n");
207		return;
208	}
209
210	err = vnic_dev_del_addr(enic->vdev, enic->mac_addr);
211	if (err) {
212		dev_err(enic, "del mac addr failed\n");
213		return;
214	}
215
216	ether_addr_copy((struct ether_addr *)mac_addr,
217		(struct ether_addr *)enic->mac_addr);
218
219	err = vnic_dev_add_addr(enic->vdev, mac_addr);
220	if (err) {
221		dev_err(enic, "add mac addr failed\n");
222		return;
223	}
224}
225
226static void
227enic_free_rq_buf(struct rte_mbuf **mbuf)
228{
229	if (*mbuf == NULL)
230		return;
231
232	rte_pktmbuf_free(*mbuf);
233	mbuf = NULL;
234}
235
236void enic_init_vnic_resources(struct enic *enic)
237{
238	unsigned int error_interrupt_enable = 1;
239	unsigned int error_interrupt_offset = 0;
240	unsigned int index = 0;
241	unsigned int cq_idx;
242	struct vnic_rq *data_rq;
243
244	for (index = 0; index < enic->rq_count; index++) {
245		cq_idx = enic_cq_rq(enic, enic_sop_rq(index));
246
247		vnic_rq_init(&enic->rq[enic_sop_rq(index)],
248			cq_idx,
249			error_interrupt_enable,
250			error_interrupt_offset);
251
252		data_rq = &enic->rq[enic_data_rq(index)];
253		if (data_rq->in_use)
254			vnic_rq_init(data_rq,
255				     cq_idx,
256				     error_interrupt_enable,
257				     error_interrupt_offset);
258
259		vnic_cq_init(&enic->cq[cq_idx],
260			0 /* flow_control_enable */,
261			1 /* color_enable */,
262			0 /* cq_head */,
263			0 /* cq_tail */,
264			1 /* cq_tail_color */,
265			0 /* interrupt_enable */,
266			1 /* cq_entry_enable */,
267			0 /* cq_message_enable */,
268			0 /* interrupt offset */,
269			0 /* cq_message_addr */);
270	}
271
272	for (index = 0; index < enic->wq_count; index++) {
273		vnic_wq_init(&enic->wq[index],
274			enic_cq_wq(enic, index),
275			error_interrupt_enable,
276			error_interrupt_offset);
277
278		cq_idx = enic_cq_wq(enic, index);
279		vnic_cq_init(&enic->cq[cq_idx],
280			0 /* flow_control_enable */,
281			1 /* color_enable */,
282			0 /* cq_head */,
283			0 /* cq_tail */,
284			1 /* cq_tail_color */,
285			0 /* interrupt_enable */,
286			0 /* cq_entry_enable */,
287			1 /* cq_message_enable */,
288			0 /* interrupt offset */,
289			(u64)enic->wq[index].cqmsg_rz->phys_addr);
290	}
291
292	vnic_intr_init(&enic->intr,
293		enic->config.intr_timer_usec,
294		enic->config.intr_timer_type,
295		/*mask_on_assertion*/1);
296}
297
298
299static int
300enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
301{
302	struct rte_mbuf *mb;
303	struct rq_enet_desc *rqd = rq->ring.descs;
304	unsigned i;
305	dma_addr_t dma_addr;
306
307	if (!rq->in_use)
308		return 0;
309
310	dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
311		  rq->ring.desc_count);
312
313	for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
314		mb = rte_mbuf_raw_alloc(rq->mp);
315		if (mb == NULL) {
316			dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
317			(unsigned)rq->index);
318			return -ENOMEM;
319		}
320
321		mb->data_off = RTE_PKTMBUF_HEADROOM;
322		dma_addr = (dma_addr_t)(mb->buf_physaddr
323			   + RTE_PKTMBUF_HEADROOM);
324		rq_enet_desc_enc(rqd, dma_addr,
325				(rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
326				: RQ_ENET_TYPE_NOT_SOP),
327				mb->buf_len - RTE_PKTMBUF_HEADROOM);
328		rq->mbuf_ring[i] = mb;
329	}
330
331	/* make sure all prior writes are complete before doing the PIO write */
332	rte_rmb();
333
334	/* Post all but the last buffer to VIC. */
335	rq->posted_index = rq->ring.desc_count - 1;
336
337	rq->rx_nb_hold = 0;
338
339	dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
340		enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
341	iowrite32(rq->posted_index, &rq->ctrl->posted_index);
342	iowrite32(0, &rq->ctrl->fetch_index);
343	rte_rmb();
344
345	return 0;
346
347}
348
349static void *
350enic_alloc_consistent(void *priv, size_t size,
351	dma_addr_t *dma_handle, u8 *name)
352{
353	void *vaddr;
354	const struct rte_memzone *rz;
355	*dma_handle = 0;
356	struct enic *enic = (struct enic *)priv;
357	struct enic_memzone_entry *mze;
358
359	rz = rte_memzone_reserve_aligned((const char *)name,
360					 size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
361	if (!rz) {
362		pr_err("%s : Failed to allocate memory requested for %s\n",
363			__func__, name);
364		return NULL;
365	}
366
367	vaddr = rz->addr;
368	*dma_handle = (dma_addr_t)rz->phys_addr;
369
370	mze = rte_malloc("enic memzone entry",
371			 sizeof(struct enic_memzone_entry), 0);
372
373	if (!mze) {
374		pr_err("%s : Failed to allocate memory for memzone list\n",
375		       __func__);
376		rte_memzone_free(rz);
377	}
378
379	mze->rz = rz;
380
381	rte_spinlock_lock(&enic->memzone_list_lock);
382	LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
383	rte_spinlock_unlock(&enic->memzone_list_lock);
384
385	return vaddr;
386}
387
388static void
389enic_free_consistent(void *priv,
390		     __rte_unused size_t size,
391		     void *vaddr,
392		     dma_addr_t dma_handle)
393{
394	struct enic_memzone_entry *mze;
395	struct enic *enic = (struct enic *)priv;
396
397	rte_spinlock_lock(&enic->memzone_list_lock);
398	LIST_FOREACH(mze, &enic->memzone_list, entries) {
399		if (mze->rz->addr == vaddr &&
400		    mze->rz->phys_addr == dma_handle)
401			break;
402	}
403	if (mze == NULL) {
404		rte_spinlock_unlock(&enic->memzone_list_lock);
405		dev_warning(enic,
406			    "Tried to free memory, but couldn't find it in the memzone list\n");
407		return;
408	}
409	LIST_REMOVE(mze, entries);
410	rte_spinlock_unlock(&enic->memzone_list_lock);
411	rte_memzone_free(mze->rz);
412	rte_free(mze);
413}
414
415static void
416enic_intr_handler(__rte_unused struct rte_intr_handle *handle,
417	void *arg)
418{
419	struct enic *enic = pmd_priv((struct rte_eth_dev *)arg);
420
421	vnic_intr_return_all_credits(&enic->intr);
422
423	enic_log_q_error(enic);
424}
425
426int enic_enable(struct enic *enic)
427{
428	unsigned int index;
429	int err;
430	struct rte_eth_dev *eth_dev = enic->rte_dev;
431
432	eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
433	eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
434	vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
435
436	if (enic_clsf_init(enic))
437		dev_warning(enic, "Init of hash table for clsf failed."\
438			"Flow director feature will not work\n");
439
440	for (index = 0; index < enic->rq_count; index++) {
441		err = enic_alloc_rx_queue_mbufs(enic,
442			&enic->rq[enic_sop_rq(index)]);
443		if (err) {
444			dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
445			return err;
446		}
447		err = enic_alloc_rx_queue_mbufs(enic,
448			&enic->rq[enic_data_rq(index)]);
449		if (err) {
450			/* release the allocated mbufs for the sop rq*/
451			enic_rxmbuf_queue_release(enic,
452				&enic->rq[enic_sop_rq(index)]);
453
454			dev_err(enic, "Failed to alloc data RX queue mbufs\n");
455			return err;
456		}
457	}
458
459	for (index = 0; index < enic->wq_count; index++)
460		enic_start_wq(enic, index);
461	for (index = 0; index < enic->rq_count; index++)
462		enic_start_rq(enic, index);
463
464	vnic_dev_add_addr(enic->vdev, enic->mac_addr);
465
466	vnic_dev_enable_wait(enic->vdev);
467
468	/* Register and enable error interrupt */
469	rte_intr_callback_register(&(enic->pdev->intr_handle),
470		enic_intr_handler, (void *)enic->rte_dev);
471
472	rte_intr_enable(&(enic->pdev->intr_handle));
473	vnic_intr_unmask(&enic->intr);
474
475	return 0;
476}
477
478int enic_alloc_intr_resources(struct enic *enic)
479{
480	int err;
481
482	dev_info(enic, "vNIC resources used:  "\
483		"wq %d rq %d cq %d intr %d\n",
484		enic->wq_count, enic_vnic_rq_count(enic),
485		enic->cq_count, enic->intr_count);
486
487	err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
488	if (err)
489		enic_free_vnic_resources(enic);
490
491	return err;
492}
493
494void enic_free_rq(void *rxq)
495{
496	struct vnic_rq *rq_sop, *rq_data;
497	struct enic *enic;
498
499	if (rxq == NULL)
500		return;
501
502	rq_sop = (struct vnic_rq *)rxq;
503	enic = vnic_dev_priv(rq_sop->vdev);
504	rq_data = &enic->rq[rq_sop->data_queue_idx];
505
506	enic_rxmbuf_queue_release(enic, rq_sop);
507	if (rq_data->in_use)
508		enic_rxmbuf_queue_release(enic, rq_data);
509
510	rte_free(rq_sop->mbuf_ring);
511	if (rq_data->in_use)
512		rte_free(rq_data->mbuf_ring);
513
514	rq_sop->mbuf_ring = NULL;
515	rq_data->mbuf_ring = NULL;
516
517	vnic_rq_free(rq_sop);
518	if (rq_data->in_use)
519		vnic_rq_free(rq_data);
520
521	vnic_cq_free(&enic->cq[rq_sop->index]);
522}
523
524void enic_start_wq(struct enic *enic, uint16_t queue_idx)
525{
526	struct rte_eth_dev *eth_dev = enic->rte_dev;
527	vnic_wq_enable(&enic->wq[queue_idx]);
528	eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
529}
530
531int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
532{
533	struct rte_eth_dev *eth_dev = enic->rte_dev;
534	int ret;
535
536	ret = vnic_wq_disable(&enic->wq[queue_idx]);
537	if (ret)
538		return ret;
539
540	eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
541	return 0;
542}
543
544void enic_start_rq(struct enic *enic, uint16_t queue_idx)
545{
546	struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
547	struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
548	struct rte_eth_dev *eth_dev = enic->rte_dev;
549
550	if (rq_data->in_use)
551		vnic_rq_enable(rq_data);
552	rte_mb();
553	vnic_rq_enable(rq_sop);
554	eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
555}
556
557int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
558{
559	int ret1 = 0, ret2 = 0;
560	struct rte_eth_dev *eth_dev = enic->rte_dev;
561	struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
562	struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
563
564	ret2 = vnic_rq_disable(rq_sop);
565	rte_mb();
566	if (rq_data->in_use)
567		ret1 = vnic_rq_disable(rq_data);
568
569	if (ret2)
570		return ret2;
571	else if (ret1)
572		return ret1;
573
574	eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
575	return 0;
576}
577
578int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
579	unsigned int socket_id, struct rte_mempool *mp,
580	uint16_t nb_desc)
581{
582	int rc;
583	uint16_t sop_queue_idx = enic_sop_rq(queue_idx);
584	uint16_t data_queue_idx = enic_data_rq(queue_idx);
585	struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
586	struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
587	unsigned int mbuf_size, mbufs_per_pkt;
588	unsigned int nb_sop_desc, nb_data_desc;
589	uint16_t min_sop, max_sop, min_data, max_data;
590
591	rq_sop->is_sop = 1;
592	rq_sop->data_queue_idx = data_queue_idx;
593	rq_data->is_sop = 0;
594	rq_data->data_queue_idx = 0;
595	rq_sop->socket_id = socket_id;
596	rq_sop->mp = mp;
597	rq_data->socket_id = socket_id;
598	rq_data->mp = mp;
599	rq_sop->in_use = 1;
600
601	mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
602			       RTE_PKTMBUF_HEADROOM);
603
604	if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
605		dev_info(enic, "Scatter rx mode enabled\n");
606		/* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
607		mbufs_per_pkt = ((enic->config.mtu + ETHER_HDR_LEN + 4) +
608				 (mbuf_size - 1)) / mbuf_size;
609	} else {
610		dev_info(enic, "Scatter rx mode disabled\n");
611		mbufs_per_pkt = 1;
612	}
613
614	if (mbufs_per_pkt > 1) {
615		dev_info(enic, "Scatter rx mode in use\n");
616		rq_data->in_use = 1;
617	} else {
618		dev_info(enic, "Scatter rx mode not being used\n");
619		rq_data->in_use = 0;
620	}
621
622	/* number of descriptors have to be a multiple of 32 */
623	nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
624	nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
625
626	rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
627	rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
628
629	if (mbufs_per_pkt > 1) {
630		min_sop = 64;
631		max_sop = ((enic->config.rq_desc_count /
632			    (mbufs_per_pkt - 1)) & ~0x1F);
633		min_data = min_sop * (mbufs_per_pkt - 1);
634		max_data = enic->config.rq_desc_count;
635	} else {
636		min_sop = 64;
637		max_sop = enic->config.rq_desc_count;
638		min_data = 0;
639		max_data = 0;
640	}
641
642	if (nb_desc < (min_sop + min_data)) {
643		dev_warning(enic,
644			    "Number of rx descs too low, adjusting to minimum\n");
645		nb_sop_desc = min_sop;
646		nb_data_desc = min_data;
647	} else if (nb_desc > (max_sop + max_data)) {
648		dev_warning(enic,
649			    "Number of rx_descs too high, adjusting to maximum\n");
650		nb_sop_desc = max_sop;
651		nb_data_desc = max_data;
652	}
653	if (mbufs_per_pkt > 1) {
654		dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
655			 enic->config.mtu, mbuf_size, min_sop + min_data,
656			 max_sop + max_data);
657	}
658	dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
659		 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
660
661	/* Allocate sop queue resources */
662	rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
663		nb_sop_desc, sizeof(struct rq_enet_desc));
664	if (rc) {
665		dev_err(enic, "error in allocation of sop rq\n");
666		goto err_exit;
667	}
668	nb_sop_desc = rq_sop->ring.desc_count;
669
670	if (rq_data->in_use) {
671		/* Allocate data queue resources */
672		rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
673				   nb_data_desc,
674				   sizeof(struct rq_enet_desc));
675		if (rc) {
676			dev_err(enic, "error in allocation of data rq\n");
677			goto err_free_rq_sop;
678		}
679		nb_data_desc = rq_data->ring.desc_count;
680	}
681	rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
682			   socket_id, nb_sop_desc + nb_data_desc,
683			   sizeof(struct cq_enet_rq_desc));
684	if (rc) {
685		dev_err(enic, "error in allocation of cq for rq\n");
686		goto err_free_rq_data;
687	}
688
689	/* Allocate the mbuf rings */
690	rq_sop->mbuf_ring = (struct rte_mbuf **)
691		rte_zmalloc_socket("rq->mbuf_ring",
692				   sizeof(struct rte_mbuf *) * nb_sop_desc,
693				   RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
694	if (rq_sop->mbuf_ring == NULL)
695		goto err_free_cq;
696
697	if (rq_data->in_use) {
698		rq_data->mbuf_ring = (struct rte_mbuf **)
699			rte_zmalloc_socket("rq->mbuf_ring",
700				sizeof(struct rte_mbuf *) * nb_data_desc,
701				RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
702		if (rq_data->mbuf_ring == NULL)
703			goto err_free_sop_mbuf;
704	}
705
706	return 0;
707
708err_free_sop_mbuf:
709	rte_free(rq_sop->mbuf_ring);
710err_free_cq:
711	/* cleanup on error */
712	vnic_cq_free(&enic->cq[queue_idx]);
713err_free_rq_data:
714	if (rq_data->in_use)
715		vnic_rq_free(rq_data);
716err_free_rq_sop:
717	vnic_rq_free(rq_sop);
718err_exit:
719	return -ENOMEM;
720}
721
722void enic_free_wq(void *txq)
723{
724	struct vnic_wq *wq;
725	struct enic *enic;
726
727	if (txq == NULL)
728		return;
729
730	wq = (struct vnic_wq *)txq;
731	enic = vnic_dev_priv(wq->vdev);
732	rte_memzone_free(wq->cqmsg_rz);
733	vnic_wq_free(wq);
734	vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
735}
736
737int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
738	unsigned int socket_id, uint16_t nb_desc)
739{
740	int err;
741	struct vnic_wq *wq = &enic->wq[queue_idx];
742	unsigned int cq_index = enic_cq_wq(enic, queue_idx);
743	char name[NAME_MAX];
744	static int instance;
745
746	wq->socket_id = socket_id;
747	if (nb_desc) {
748		if (nb_desc > enic->config.wq_desc_count) {
749			dev_warning(enic,
750				"WQ %d - number of tx desc in cmd line (%d)"\
751				"is greater than that in the UCSM/CIMC adapter"\
752				"policy.  Applying the value in the adapter "\
753				"policy (%d)\n",
754				queue_idx, nb_desc, enic->config.wq_desc_count);
755		} else if (nb_desc != enic->config.wq_desc_count) {
756			enic->config.wq_desc_count = nb_desc;
757			dev_info(enic,
758				"TX Queues - effective number of descs:%d\n",
759				nb_desc);
760		}
761	}
762
763	/* Allocate queue resources */
764	err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
765		enic->config.wq_desc_count,
766		sizeof(struct wq_enet_desc));
767	if (err) {
768		dev_err(enic, "error in allocation of wq\n");
769		return err;
770	}
771
772	err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
773		socket_id, enic->config.wq_desc_count,
774		sizeof(struct cq_enet_wq_desc));
775	if (err) {
776		vnic_wq_free(wq);
777		dev_err(enic, "error in allocation of cq for wq\n");
778	}
779
780	/* setup up CQ message */
781	snprintf((char *)name, sizeof(name),
782		 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
783		instance++);
784
785	wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
786						   sizeof(uint32_t),
787						   SOCKET_ID_ANY, 0,
788						   ENIC_ALIGN);
789	if (!wq->cqmsg_rz)
790		return -ENOMEM;
791
792	return err;
793}
794
795int enic_disable(struct enic *enic)
796{
797	unsigned int i;
798	int err;
799
800	vnic_intr_mask(&enic->intr);
801	(void)vnic_intr_masked(&enic->intr); /* flush write */
802
803	vnic_dev_disable(enic->vdev);
804
805	enic_clsf_destroy(enic);
806
807	if (!enic_is_sriov_vf(enic))
808		vnic_dev_del_addr(enic->vdev, enic->mac_addr);
809
810	for (i = 0; i < enic->wq_count; i++) {
811		err = vnic_wq_disable(&enic->wq[i]);
812		if (err)
813			return err;
814	}
815	for (i = 0; i < enic_vnic_rq_count(enic); i++) {
816		if (enic->rq[i].in_use) {
817			err = vnic_rq_disable(&enic->rq[i]);
818			if (err)
819				return err;
820		}
821	}
822
823	vnic_dev_set_reset_flag(enic->vdev, 1);
824	vnic_dev_notify_unset(enic->vdev);
825
826	for (i = 0; i < enic->wq_count; i++)
827		vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
828
829	for (i = 0; i < enic_vnic_rq_count(enic); i++)
830		if (enic->rq[i].in_use)
831			vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
832	for (i = 0; i < enic->cq_count; i++)
833		vnic_cq_clean(&enic->cq[i]);
834	vnic_intr_clean(&enic->intr);
835
836	return 0;
837}
838
839static int enic_dev_wait(struct vnic_dev *vdev,
840	int (*start)(struct vnic_dev *, int),
841	int (*finished)(struct vnic_dev *, int *),
842	int arg)
843{
844	int done;
845	int err;
846	int i;
847
848	err = start(vdev, arg);
849	if (err)
850		return err;
851
852	/* Wait for func to complete...2 seconds max */
853	for (i = 0; i < 2000; i++) {
854		err = finished(vdev, &done);
855		if (err)
856			return err;
857		if (done)
858			return 0;
859		usleep(1000);
860	}
861	return -ETIMEDOUT;
862}
863
864static int enic_dev_open(struct enic *enic)
865{
866	int err;
867
868	err = enic_dev_wait(enic->vdev, vnic_dev_open,
869		vnic_dev_open_done, 0);
870	if (err)
871		dev_err(enic_get_dev(enic),
872			"vNIC device open failed, err %d\n", err);
873
874	return err;
875}
876
877static int enic_set_rsskey(struct enic *enic)
878{
879	dma_addr_t rss_key_buf_pa;
880	union vnic_rss_key *rss_key_buf_va = NULL;
881	static union vnic_rss_key rss_key = {
882		.key = {
883			[0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
884			[1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
885			[2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
886			[3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
887		}
888	};
889	int err;
890	u8 name[NAME_MAX];
891
892	snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
893	rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
894		&rss_key_buf_pa, name);
895	if (!rss_key_buf_va)
896		return -ENOMEM;
897
898	rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
899
900	err = enic_set_rss_key(enic,
901		rss_key_buf_pa,
902		sizeof(union vnic_rss_key));
903
904	enic_free_consistent(enic, sizeof(union vnic_rss_key),
905		rss_key_buf_va, rss_key_buf_pa);
906
907	return err;
908}
909
910static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
911{
912	dma_addr_t rss_cpu_buf_pa;
913	union vnic_rss_cpu *rss_cpu_buf_va = NULL;
914	int i;
915	int err;
916	u8 name[NAME_MAX];
917
918	snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
919	rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
920		&rss_cpu_buf_pa, name);
921	if (!rss_cpu_buf_va)
922		return -ENOMEM;
923
924	for (i = 0; i < (1 << rss_hash_bits); i++)
925		(*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
926			enic_sop_rq(i % enic->rq_count);
927
928	err = enic_set_rss_cpu(enic,
929		rss_cpu_buf_pa,
930		sizeof(union vnic_rss_cpu));
931
932	enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
933		rss_cpu_buf_va, rss_cpu_buf_pa);
934
935	return err;
936}
937
938static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
939	u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
940{
941	const u8 tso_ipid_split_en = 0;
942	int err;
943
944	/* Enable VLAN tag stripping */
945
946	err = enic_set_nic_cfg(enic,
947		rss_default_cpu, rss_hash_type,
948		rss_hash_bits, rss_base_cpu,
949		rss_enable, tso_ipid_split_en,
950		enic->ig_vlan_strip_en);
951
952	return err;
953}
954
955int enic_set_rss_nic_cfg(struct enic *enic)
956{
957	const u8 rss_default_cpu = 0;
958	const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
959	    NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
960	    NIC_CFG_RSS_HASH_TYPE_IPV6 |
961	    NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
962	const u8 rss_hash_bits = 7;
963	const u8 rss_base_cpu = 0;
964	u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
965
966	if (rss_enable) {
967		if (!enic_set_rsskey(enic)) {
968			if (enic_set_rsscpu(enic, rss_hash_bits)) {
969				rss_enable = 0;
970				dev_warning(enic, "RSS disabled, "\
971					"Failed to set RSS cpu indirection table.");
972			}
973		} else {
974			rss_enable = 0;
975			dev_warning(enic,
976				"RSS disabled, Failed to set RSS key.\n");
977		}
978	}
979
980	return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
981		rss_hash_bits, rss_base_cpu, rss_enable);
982}
983
984int enic_setup_finish(struct enic *enic)
985{
986	int ret;
987
988	enic_init_soft_stats(enic);
989
990	ret = enic_set_rss_nic_cfg(enic);
991	if (ret) {
992		dev_err(enic, "Failed to config nic, aborting.\n");
993		return -1;
994	}
995
996	/* Default conf */
997	vnic_dev_packet_filter(enic->vdev,
998		1 /* directed  */,
999		1 /* multicast */,
1000		1 /* broadcast */,
1001		0 /* promisc   */,
1002		1 /* allmulti  */);
1003
1004	enic->promisc = 0;
1005	enic->allmulti = 1;
1006
1007	return 0;
1008}
1009
1010void enic_add_packet_filter(struct enic *enic)
1011{
1012	/* Args -> directed, multicast, broadcast, promisc, allmulti */
1013	vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1014		enic->promisc, enic->allmulti);
1015}
1016
1017int enic_get_link_status(struct enic *enic)
1018{
1019	return vnic_dev_link_status(enic->vdev);
1020}
1021
1022static void enic_dev_deinit(struct enic *enic)
1023{
1024	struct rte_eth_dev *eth_dev = enic->rte_dev;
1025
1026	rte_free(eth_dev->data->mac_addrs);
1027}
1028
1029
1030int enic_set_vnic_res(struct enic *enic)
1031{
1032	struct rte_eth_dev *eth_dev = enic->rte_dev;
1033	int rc = 0;
1034
1035	/* With Rx scatter support, two RQs are now used per RQ used by
1036	 * the application.
1037	 */
1038	if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1039		dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1040			eth_dev->data->nb_rx_queues,
1041			eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1042		rc = -EINVAL;
1043	}
1044	if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1045		dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1046			eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1047		rc = -EINVAL;
1048	}
1049
1050	if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1051				   eth_dev->data->nb_tx_queues)) {
1052		dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1053			(eth_dev->data->nb_rx_queues +
1054			 eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1055		rc = -EINVAL;
1056	}
1057
1058	if (rc == 0) {
1059		enic->rq_count = eth_dev->data->nb_rx_queues;
1060		enic->wq_count = eth_dev->data->nb_tx_queues;
1061		enic->cq_count = enic->rq_count + enic->wq_count;
1062	}
1063
1064	return rc;
1065}
1066
1067/* The Cisco NIC can send and receive packets up to a max packet size
1068 * determined by the NIC type and firmware. There is also an MTU
1069 * configured into the NIC via the CIMC/UCSM management interface
1070 * which can be overridden by this function (up to the max packet size).
1071 * Depending on the network setup, doing so may cause packet drops
1072 * and unexpected behavior.
1073 */
1074int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1075{
1076	uint16_t old_mtu;	/* previous setting */
1077	uint16_t config_mtu;	/* Value configured into NIC via CIMC/UCSM */
1078	struct rte_eth_dev *eth_dev = enic->rte_dev;
1079
1080	old_mtu = eth_dev->data->mtu;
1081	config_mtu = enic->config.mtu;
1082
1083	/* only works with Rx scatter disabled */
1084	if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter)
1085		return -ENOTSUP;
1086
1087	if (new_mtu > enic->max_mtu) {
1088		dev_err(enic,
1089			"MTU not updated: requested (%u) greater than max (%u)\n",
1090			new_mtu, enic->max_mtu);
1091		return -EINVAL;
1092	}
1093	if (new_mtu < ENIC_MIN_MTU) {
1094		dev_info(enic,
1095			"MTU not updated: requested (%u) less than min (%u)\n",
1096			new_mtu, ENIC_MIN_MTU);
1097		return -EINVAL;
1098	}
1099	if (new_mtu > config_mtu)
1100		dev_warning(enic,
1101			"MTU (%u) is greater than value configured in NIC (%u)\n",
1102			new_mtu, config_mtu);
1103
1104	/* update the mtu */
1105	eth_dev->data->mtu = new_mtu;
1106
1107	dev_info(enic, "MTU changed from %u to %u\n",  old_mtu, new_mtu);
1108	return 0;
1109}
1110
1111static int enic_dev_init(struct enic *enic)
1112{
1113	int err;
1114	struct rte_eth_dev *eth_dev = enic->rte_dev;
1115
1116	vnic_dev_intr_coal_timer_info_default(enic->vdev);
1117
1118	/* Get vNIC configuration
1119	*/
1120	err = enic_get_vnic_config(enic);
1121	if (err) {
1122		dev_err(dev, "Get vNIC configuration failed, aborting\n");
1123		return err;
1124	}
1125
1126	/* Get the supported filters */
1127	enic_fdir_info(enic);
1128
1129	eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN, 0);
1130	if (!eth_dev->data->mac_addrs) {
1131		dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1132		return -1;
1133	}
1134	ether_addr_copy((struct ether_addr *) enic->mac_addr,
1135		&eth_dev->data->mac_addrs[0]);
1136
1137
1138	/* Get available resource counts
1139	*/
1140	enic_get_res_counts(enic);
1141
1142	vnic_dev_set_reset_flag(enic->vdev, 0);
1143
1144	return 0;
1145
1146}
1147
1148int enic_probe(struct enic *enic)
1149{
1150	struct rte_pci_device *pdev = enic->pdev;
1151	int err = -1;
1152
1153	dev_debug(enic, " Initializing ENIC PMD\n");
1154
1155	enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1156	enic->bar0.len = pdev->mem_resource[0].len;
1157
1158	/* Register vNIC device */
1159	enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1160	if (!enic->vdev) {
1161		dev_err(enic, "vNIC registration failed, aborting\n");
1162		goto err_out;
1163	}
1164
1165	LIST_INIT(&enic->memzone_list);
1166	rte_spinlock_init(&enic->memzone_list_lock);
1167
1168	vnic_register_cbacks(enic->vdev,
1169		enic_alloc_consistent,
1170		enic_free_consistent);
1171
1172	/* Issue device open to get device in known state */
1173	err = enic_dev_open(enic);
1174	if (err) {
1175		dev_err(enic, "vNIC dev open failed, aborting\n");
1176		goto err_out_unregister;
1177	}
1178
1179	/* Set ingress vlan rewrite mode before vnic initialization */
1180	err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1181		IG_VLAN_REWRITE_MODE_PASS_THRU);
1182	if (err) {
1183		dev_err(enic,
1184			"Failed to set ingress vlan rewrite mode, aborting.\n");
1185		goto err_out_dev_close;
1186	}
1187
1188	/* Issue device init to initialize the vnic-to-switch link.
1189	 * We'll start with carrier off and wait for link UP
1190	 * notification later to turn on carrier.  We don't need
1191	 * to wait here for the vnic-to-switch link initialization
1192	 * to complete; link UP notification is the indication that
1193	 * the process is complete.
1194	 */
1195
1196	err = vnic_dev_init(enic->vdev, 0);
1197	if (err) {
1198		dev_err(enic, "vNIC dev init failed, aborting\n");
1199		goto err_out_dev_close;
1200	}
1201
1202	err = enic_dev_init(enic);
1203	if (err) {
1204		dev_err(enic, "Device initialization failed, aborting\n");
1205		goto err_out_dev_close;
1206	}
1207
1208	return 0;
1209
1210err_out_dev_close:
1211	vnic_dev_close(enic->vdev);
1212err_out_unregister:
1213	vnic_dev_unregister(enic->vdev);
1214err_out:
1215	return err;
1216}
1217
1218void enic_remove(struct enic *enic)
1219{
1220	enic_dev_deinit(enic);
1221	vnic_dev_close(enic->vdev);
1222	vnic_dev_unregister(enic->vdev);
1223}
1224