enic_main.c revision 93f15e30
1/*
2 * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4 *
5 * Copyright (c) 2014, Cisco Systems, Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 *
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
18 * distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35#include <stdio.h>
36
37#include <sys/stat.h>
38#include <sys/mman.h>
39#include <fcntl.h>
40#include <libgen.h>
41
42#include <rte_pci.h>
43#include <rte_memzone.h>
44#include <rte_malloc.h>
45#include <rte_mbuf.h>
46#include <rte_string_fns.h>
47#include <rte_ethdev.h>
48
49#include "enic_compat.h"
50#include "enic.h"
51#include "wq_enet_desc.h"
52#include "rq_enet_desc.h"
53#include "cq_enet_desc.h"
54#include "vnic_enet.h"
55#include "vnic_dev.h"
56#include "vnic_wq.h"
57#include "vnic_rq.h"
58#include "vnic_cq.h"
59#include "vnic_intr.h"
60#include "vnic_nic.h"
61
62static inline int enic_is_sriov_vf(struct enic *enic)
63{
64	return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
65}
66
67static int is_zero_addr(uint8_t *addr)
68{
69	return !(addr[0] |  addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
70}
71
72static int is_mcast_addr(uint8_t *addr)
73{
74	return addr[0] & 1;
75}
76
77static int is_eth_addr_valid(uint8_t *addr)
78{
79	return !is_mcast_addr(addr) && !is_zero_addr(addr);
80}
81
82static void
83enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
84{
85	uint16_t i;
86
87	if (!rq || !rq->mbuf_ring) {
88		dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
89		return;
90	}
91
92	for (i = 0; i < rq->ring.desc_count; i++) {
93		if (rq->mbuf_ring[i]) {
94			rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
95			rq->mbuf_ring[i] = NULL;
96		}
97	}
98}
99
100void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
101{
102	vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
103}
104
105static void enic_free_wq_buf(struct vnic_wq_buf *buf)
106{
107	struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
108
109	rte_pktmbuf_free_seg(mbuf);
110	buf->mb = NULL;
111}
112
113static void enic_log_q_error(struct enic *enic)
114{
115	unsigned int i;
116	u32 error_status;
117
118	for (i = 0; i < enic->wq_count; i++) {
119		error_status = vnic_wq_error_status(&enic->wq[i]);
120		if (error_status)
121			dev_err(enic, "WQ[%d] error_status %d\n", i,
122				error_status);
123	}
124
125	for (i = 0; i < enic_vnic_rq_count(enic); i++) {
126		if (!enic->rq[i].in_use)
127			continue;
128		error_status = vnic_rq_error_status(&enic->rq[i]);
129		if (error_status)
130			dev_err(enic, "RQ[%d] error_status %d\n", i,
131				error_status);
132	}
133}
134
135static void enic_clear_soft_stats(struct enic *enic)
136{
137	struct enic_soft_stats *soft_stats = &enic->soft_stats;
138	rte_atomic64_clear(&soft_stats->rx_nombuf);
139	rte_atomic64_clear(&soft_stats->rx_packet_errors);
140	rte_atomic64_clear(&soft_stats->tx_oversized);
141}
142
143static void enic_init_soft_stats(struct enic *enic)
144{
145	struct enic_soft_stats *soft_stats = &enic->soft_stats;
146	rte_atomic64_init(&soft_stats->rx_nombuf);
147	rte_atomic64_init(&soft_stats->rx_packet_errors);
148	rte_atomic64_init(&soft_stats->tx_oversized);
149	enic_clear_soft_stats(enic);
150}
151
152void enic_dev_stats_clear(struct enic *enic)
153{
154	if (vnic_dev_stats_clear(enic->vdev))
155		dev_err(enic, "Error in clearing stats\n");
156	enic_clear_soft_stats(enic);
157}
158
159void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
160{
161	struct vnic_stats *stats;
162	struct enic_soft_stats *soft_stats = &enic->soft_stats;
163	int64_t rx_truncated;
164	uint64_t rx_packet_errors;
165
166	if (vnic_dev_stats_dump(enic->vdev, &stats)) {
167		dev_err(enic, "Error in getting stats\n");
168		return;
169	}
170
171	/* The number of truncated packets can only be calculated by
172	 * subtracting a hardware counter from error packets received by
173	 * the driver. Note: this causes transient inaccuracies in the
174	 * ipackets count. Also, the length of truncated packets are
175	 * counted in ibytes even though truncated packets are dropped
176	 * which can make ibytes be slightly higher than it should be.
177	 */
178	rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
179	rx_truncated = rx_packet_errors - stats->rx.rx_errors;
180#define TREX_PATCH
181#ifdef TREX_PATCH
182    // This used to be in older DPDK version, and seems to be needed. Was removed for some reason in dpdk1702.
183		rx_truncated -= stats->rx.rx_no_bufs;
184#endif
185
186	r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
187	r_stats->opackets = stats->tx.tx_frames_ok;
188
189#ifdef TREX_PATCH
190    r_stats->ibytes = stats->rx.rx_unicast_bytes_ok+stats->rx.rx_multicast_bytes_ok+stats->rx.rx_broadcast_bytes_ok;
191#else
192	r_stats->ibytes = stats->rx.rx_bytes_ok;
193#endif
194	r_stats->obytes = stats->tx.tx_bytes_ok;
195
196	r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
197	r_stats->oerrors = stats->tx.tx_errors
198			   + rte_atomic64_read(&soft_stats->tx_oversized);
199
200	r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
201
202	r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
203}
204
205void enic_del_mac_address(struct enic *enic, int mac_index)
206{
207	struct rte_eth_dev *eth_dev = enic->rte_dev;
208	uint8_t *mac_addr = eth_dev->data->mac_addrs[mac_index].addr_bytes;
209
210	if (vnic_dev_del_addr(enic->vdev, mac_addr))
211		dev_err(enic, "del mac addr failed\n");
212}
213
214void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
215{
216	int err;
217
218	if (!is_eth_addr_valid(mac_addr)) {
219		dev_err(enic, "invalid mac address\n");
220		return;
221	}
222
223	err = vnic_dev_add_addr(enic->vdev, mac_addr);
224	if (err) {
225		dev_err(enic, "add mac addr failed\n");
226		return;
227	}
228}
229
230static void
231enic_free_rq_buf(struct rte_mbuf **mbuf)
232{
233	if (*mbuf == NULL)
234		return;
235
236	rte_pktmbuf_free(*mbuf);
237	mbuf = NULL;
238}
239
240void enic_init_vnic_resources(struct enic *enic)
241{
242	unsigned int error_interrupt_enable = 1;
243	unsigned int error_interrupt_offset = 0;
244	unsigned int index = 0;
245	unsigned int cq_idx;
246	struct vnic_rq *data_rq;
247
248	for (index = 0; index < enic->rq_count; index++) {
249		cq_idx = enic_cq_rq(enic, enic_rte_rq_idx_to_sop_idx(index));
250
251		vnic_rq_init(&enic->rq[enic_rte_rq_idx_to_sop_idx(index)],
252			cq_idx,
253			error_interrupt_enable,
254			error_interrupt_offset);
255
256		data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index)];
257		if (data_rq->in_use)
258			vnic_rq_init(data_rq,
259				     cq_idx,
260				     error_interrupt_enable,
261				     error_interrupt_offset);
262
263		vnic_cq_init(&enic->cq[cq_idx],
264			0 /* flow_control_enable */,
265			1 /* color_enable */,
266			0 /* cq_head */,
267			0 /* cq_tail */,
268			1 /* cq_tail_color */,
269			0 /* interrupt_enable */,
270			1 /* cq_entry_enable */,
271			0 /* cq_message_enable */,
272			0 /* interrupt offset */,
273			0 /* cq_message_addr */);
274	}
275
276	for (index = 0; index < enic->wq_count; index++) {
277		vnic_wq_init(&enic->wq[index],
278			enic_cq_wq(enic, index),
279			error_interrupt_enable,
280			error_interrupt_offset);
281
282		cq_idx = enic_cq_wq(enic, index);
283		vnic_cq_init(&enic->cq[cq_idx],
284			0 /* flow_control_enable */,
285			1 /* color_enable */,
286			0 /* cq_head */,
287			0 /* cq_tail */,
288			1 /* cq_tail_color */,
289			0 /* interrupt_enable */,
290			0 /* cq_entry_enable */,
291			1 /* cq_message_enable */,
292			0 /* interrupt offset */,
293			(u64)enic->wq[index].cqmsg_rz->phys_addr);
294	}
295
296	vnic_intr_init(&enic->intr,
297		enic->config.intr_timer_usec,
298		enic->config.intr_timer_type,
299		/*mask_on_assertion*/1);
300}
301
302
303static int
304enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
305{
306	struct rte_mbuf *mb;
307	struct rq_enet_desc *rqd = rq->ring.descs;
308	unsigned i;
309	dma_addr_t dma_addr;
310
311	if (!rq->in_use)
312		return 0;
313
314	dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
315		  rq->ring.desc_count);
316
317	for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
318		mb = rte_mbuf_raw_alloc(rq->mp);
319		if (mb == NULL) {
320			dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
321			(unsigned)rq->index);
322			return -ENOMEM;
323		}
324
325		mb->data_off = RTE_PKTMBUF_HEADROOM;
326		dma_addr = (dma_addr_t)(mb->buf_physaddr
327			   + RTE_PKTMBUF_HEADROOM);
328		rq_enet_desc_enc(rqd, dma_addr,
329				(rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
330				: RQ_ENET_TYPE_NOT_SOP),
331				mb->buf_len - RTE_PKTMBUF_HEADROOM);
332		rq->mbuf_ring[i] = mb;
333	}
334
335	/* make sure all prior writes are complete before doing the PIO write */
336	rte_rmb();
337
338	/* Post all but the last buffer to VIC. */
339	rq->posted_index = rq->ring.desc_count - 1;
340
341	rq->rx_nb_hold = 0;
342
343	dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
344		enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
345	iowrite32(rq->posted_index, &rq->ctrl->posted_index);
346	iowrite32(0, &rq->ctrl->fetch_index);
347	rte_rmb();
348
349	return 0;
350
351}
352
353static void *
354enic_alloc_consistent(void *priv, size_t size,
355	dma_addr_t *dma_handle, u8 *name)
356{
357	void *vaddr;
358	const struct rte_memzone *rz;
359	*dma_handle = 0;
360	struct enic *enic = (struct enic *)priv;
361	struct enic_memzone_entry *mze;
362
363	rz = rte_memzone_reserve_aligned((const char *)name,
364					 size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
365	if (!rz) {
366		pr_err("%s : Failed to allocate memory requested for %s\n",
367			__func__, name);
368		return NULL;
369	}
370
371	vaddr = rz->addr;
372	*dma_handle = (dma_addr_t)rz->phys_addr;
373
374	mze = rte_malloc("enic memzone entry",
375			 sizeof(struct enic_memzone_entry), 0);
376
377	if (!mze) {
378		pr_err("%s : Failed to allocate memory for memzone list\n",
379		       __func__);
380		rte_memzone_free(rz);
381	}
382
383	mze->rz = rz;
384
385	rte_spinlock_lock(&enic->memzone_list_lock);
386	LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
387	rte_spinlock_unlock(&enic->memzone_list_lock);
388
389	return vaddr;
390}
391
392static void
393enic_free_consistent(void *priv,
394		     __rte_unused size_t size,
395		     void *vaddr,
396		     dma_addr_t dma_handle)
397{
398	struct enic_memzone_entry *mze;
399	struct enic *enic = (struct enic *)priv;
400
401	rte_spinlock_lock(&enic->memzone_list_lock);
402	LIST_FOREACH(mze, &enic->memzone_list, entries) {
403		if (mze->rz->addr == vaddr &&
404		    mze->rz->phys_addr == dma_handle)
405			break;
406	}
407	if (mze == NULL) {
408		rte_spinlock_unlock(&enic->memzone_list_lock);
409		dev_warning(enic,
410			    "Tried to free memory, but couldn't find it in the memzone list\n");
411		return;
412	}
413	LIST_REMOVE(mze, entries);
414	rte_spinlock_unlock(&enic->memzone_list_lock);
415	rte_memzone_free(mze->rz);
416	rte_free(mze);
417}
418
419int enic_link_update(struct enic *enic)
420{
421	struct rte_eth_dev *eth_dev = enic->rte_dev;
422	int ret;
423	int link_status = 0;
424
425	link_status = enic_get_link_status(enic);
426	ret = (link_status == enic->link_status);
427	enic->link_status = link_status;
428	eth_dev->data->dev_link.link_status = link_status;
429	eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
430	eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
431	return ret;
432}
433
434static void
435enic_intr_handler(__rte_unused struct rte_intr_handle *handle,
436	void *arg)
437{
438	struct rte_eth_dev *dev = (struct rte_eth_dev *)arg;
439	struct enic *enic = pmd_priv(dev);
440
441	vnic_intr_return_all_credits(&enic->intr);
442
443	enic_link_update(enic);
444	_rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
445	enic_log_q_error(enic);
446}
447
448int enic_enable(struct enic *enic)
449{
450	unsigned int index;
451	int err;
452	struct rte_eth_dev *eth_dev = enic->rte_dev;
453
454	eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
455	eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
456
457	/* vnic notification of link status has already been turned on in
458	 * enic_dev_init() which is called during probe time.  Here we are
459	 * just turning on interrupt vector 0 if needed.
460	 */
461	if (eth_dev->data->dev_conf.intr_conf.lsc)
462		vnic_dev_notify_set(enic->vdev, 0);
463
464	if (enic_clsf_init(enic))
465		dev_warning(enic, "Init of hash table for clsf failed."\
466			"Flow director feature will not work\n");
467
468	for (index = 0; index < enic->rq_count; index++) {
469		err = enic_alloc_rx_queue_mbufs(enic,
470			&enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
471		if (err) {
472			dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
473			return err;
474		}
475		err = enic_alloc_rx_queue_mbufs(enic,
476			&enic->rq[enic_rte_rq_idx_to_data_idx(index)]);
477		if (err) {
478			/* release the allocated mbufs for the sop rq*/
479			enic_rxmbuf_queue_release(enic,
480				&enic->rq[enic_rte_rq_idx_to_sop_idx(index)]);
481
482			dev_err(enic, "Failed to alloc data RX queue mbufs\n");
483			return err;
484		}
485	}
486
487	for (index = 0; index < enic->wq_count; index++)
488		enic_start_wq(enic, index);
489	for (index = 0; index < enic->rq_count; index++)
490		enic_start_rq(enic, index);
491
492	vnic_dev_add_addr(enic->vdev, enic->mac_addr);
493
494	vnic_dev_enable_wait(enic->vdev);
495
496	/* Register and enable error interrupt */
497	rte_intr_callback_register(&(enic->pdev->intr_handle),
498		enic_intr_handler, (void *)enic->rte_dev);
499
500	rte_intr_enable(&(enic->pdev->intr_handle));
501	vnic_intr_unmask(&enic->intr);
502
503	return 0;
504}
505
506int enic_alloc_intr_resources(struct enic *enic)
507{
508	int err;
509
510	dev_info(enic, "vNIC resources used:  "\
511		"wq %d rq %d cq %d intr %d\n",
512		enic->wq_count, enic_vnic_rq_count(enic),
513		enic->cq_count, enic->intr_count);
514
515	err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
516	if (err)
517		enic_free_vnic_resources(enic);
518
519	return err;
520}
521
522void enic_free_rq(void *rxq)
523{
524	struct vnic_rq *rq_sop, *rq_data;
525	struct enic *enic;
526
527	if (rxq == NULL)
528		return;
529
530	rq_sop = (struct vnic_rq *)rxq;
531	enic = vnic_dev_priv(rq_sop->vdev);
532	rq_data = &enic->rq[rq_sop->data_queue_idx];
533
534	enic_rxmbuf_queue_release(enic, rq_sop);
535	if (rq_data->in_use)
536		enic_rxmbuf_queue_release(enic, rq_data);
537
538	rte_free(rq_sop->mbuf_ring);
539	if (rq_data->in_use)
540		rte_free(rq_data->mbuf_ring);
541
542	rq_sop->mbuf_ring = NULL;
543	rq_data->mbuf_ring = NULL;
544
545	vnic_rq_free(rq_sop);
546	if (rq_data->in_use)
547		vnic_rq_free(rq_data);
548
549	vnic_cq_free(&enic->cq[enic_sop_rq_idx_to_cq_idx(rq_sop->index)]);
550
551	rq_sop->in_use = 0;
552	rq_data->in_use = 0;
553}
554
555void enic_start_wq(struct enic *enic, uint16_t queue_idx)
556{
557	struct rte_eth_dev *eth_dev = enic->rte_dev;
558	vnic_wq_enable(&enic->wq[queue_idx]);
559	eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
560}
561
562int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
563{
564	struct rte_eth_dev *eth_dev = enic->rte_dev;
565	int ret;
566
567	ret = vnic_wq_disable(&enic->wq[queue_idx]);
568	if (ret)
569		return ret;
570
571	eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
572	return 0;
573}
574
575void enic_start_rq(struct enic *enic, uint16_t queue_idx)
576{
577	struct vnic_rq *rq_sop;
578	struct vnic_rq *rq_data;
579	rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
580	rq_data = &enic->rq[rq_sop->data_queue_idx];
581	struct rte_eth_dev *eth_dev = enic->rte_dev;
582
583	if (rq_data->in_use)
584		vnic_rq_enable(rq_data);
585	rte_mb();
586	vnic_rq_enable(rq_sop);
587	eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
588}
589
590int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
591{
592	int ret1 = 0, ret2 = 0;
593	struct rte_eth_dev *eth_dev = enic->rte_dev;
594	struct vnic_rq *rq_sop;
595	struct vnic_rq *rq_data;
596	rq_sop = &enic->rq[enic_rte_rq_idx_to_sop_idx(queue_idx)];
597	rq_data = &enic->rq[rq_sop->data_queue_idx];
598
599	ret2 = vnic_rq_disable(rq_sop);
600	rte_mb();
601	if (rq_data->in_use)
602		ret1 = vnic_rq_disable(rq_data);
603
604	if (ret2)
605		return ret2;
606	else if (ret1)
607		return ret1;
608
609	eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
610	return 0;
611}
612
613int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
614	unsigned int socket_id, struct rte_mempool *mp,
615	uint16_t nb_desc, uint16_t free_thresh)
616{
617	int rc;
618	uint16_t sop_queue_idx = enic_rte_rq_idx_to_sop_idx(queue_idx);
619	uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx);
620	struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
621	struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
622	unsigned int mbuf_size, mbufs_per_pkt;
623	unsigned int nb_sop_desc, nb_data_desc;
624	uint16_t min_sop, max_sop, min_data, max_data;
625	uint16_t mtu = enic->rte_dev->data->mtu;
626
627	rq_sop->is_sop = 1;
628	rq_sop->data_queue_idx = data_queue_idx;
629	rq_data->is_sop = 0;
630	rq_data->data_queue_idx = 0;
631	rq_sop->socket_id = socket_id;
632	rq_sop->mp = mp;
633	rq_data->socket_id = socket_id;
634	rq_data->mp = mp;
635	rq_sop->in_use = 1;
636	rq_sop->rx_free_thresh = free_thresh;
637	rq_data->rx_free_thresh = free_thresh;
638	dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx,
639		  free_thresh);
640
641	mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
642			       RTE_PKTMBUF_HEADROOM);
643
644	if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
645		dev_info(enic, "Rq %u Scatter rx mode enabled\n", queue_idx);
646		/* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
647		mbufs_per_pkt = ((mtu + ETHER_HDR_LEN + 4) +
648				 (mbuf_size - 1)) / mbuf_size;
649	} else {
650		dev_info(enic, "Scatter rx mode disabled\n");
651		mbufs_per_pkt = 1;
652	}
653
654	if (mbufs_per_pkt > 1) {
655		dev_info(enic, "Rq %u Scatter rx mode in use\n", queue_idx);
656		rq_sop->data_queue_enable = 1;
657		rq_data->in_use = 1;
658	} else {
659		dev_info(enic, "Rq %u Scatter rx mode not being used\n",
660			 queue_idx);
661		rq_sop->data_queue_enable = 0;
662		rq_data->in_use = 0;
663	}
664
665	/* number of descriptors have to be a multiple of 32 */
666	nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
667	nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
668
669	rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
670	rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
671
672	if (mbufs_per_pkt > 1) {
673		min_sop = 64;
674		max_sop = ((enic->config.rq_desc_count /
675			    (mbufs_per_pkt - 1)) & ~0x1F);
676		min_data = min_sop * (mbufs_per_pkt - 1);
677		max_data = enic->config.rq_desc_count;
678	} else {
679		min_sop = 64;
680		max_sop = enic->config.rq_desc_count;
681		min_data = 0;
682		max_data = 0;
683	}
684
685	if (nb_desc < (min_sop + min_data)) {
686		dev_warning(enic,
687			    "Number of rx descs too low, adjusting to minimum\n");
688		nb_sop_desc = min_sop;
689		nb_data_desc = min_data;
690	} else if (nb_desc > (max_sop + max_data)) {
691		dev_warning(enic,
692			    "Number of rx_descs too high, adjusting to maximum\n");
693		nb_sop_desc = max_sop;
694		nb_data_desc = max_data;
695	}
696	if (mbufs_per_pkt > 1) {
697		dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
698			 mtu, mbuf_size, min_sop + min_data,
699			 max_sop + max_data);
700	}
701	dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
702		 nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
703
704	/* Allocate sop queue resources */
705	rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
706		nb_sop_desc, sizeof(struct rq_enet_desc));
707	if (rc) {
708		dev_err(enic, "error in allocation of sop rq\n");
709		goto err_exit;
710	}
711	nb_sop_desc = rq_sop->ring.desc_count;
712
713	if (rq_data->in_use) {
714		/* Allocate data queue resources */
715		rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
716				   nb_data_desc,
717				   sizeof(struct rq_enet_desc));
718		if (rc) {
719			dev_err(enic, "error in allocation of data rq\n");
720			goto err_free_rq_sop;
721		}
722		nb_data_desc = rq_data->ring.desc_count;
723	}
724	rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
725			   socket_id, nb_sop_desc + nb_data_desc,
726			   sizeof(struct cq_enet_rq_desc));
727	if (rc) {
728		dev_err(enic, "error in allocation of cq for rq\n");
729		goto err_free_rq_data;
730	}
731
732	/* Allocate the mbuf rings */
733	rq_sop->mbuf_ring = (struct rte_mbuf **)
734		rte_zmalloc_socket("rq->mbuf_ring",
735				   sizeof(struct rte_mbuf *) * nb_sop_desc,
736				   RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
737	if (rq_sop->mbuf_ring == NULL)
738		goto err_free_cq;
739
740	if (rq_data->in_use) {
741		rq_data->mbuf_ring = (struct rte_mbuf **)
742			rte_zmalloc_socket("rq->mbuf_ring",
743				sizeof(struct rte_mbuf *) * nb_data_desc,
744				RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
745		if (rq_data->mbuf_ring == NULL)
746			goto err_free_sop_mbuf;
747	}
748
749	rq_sop->tot_nb_desc = nb_desc; /* squirl away for MTU update function */
750
751	return 0;
752
753err_free_sop_mbuf:
754	rte_free(rq_sop->mbuf_ring);
755err_free_cq:
756	/* cleanup on error */
757	vnic_cq_free(&enic->cq[queue_idx]);
758err_free_rq_data:
759	if (rq_data->in_use)
760		vnic_rq_free(rq_data);
761err_free_rq_sop:
762	vnic_rq_free(rq_sop);
763err_exit:
764	return -ENOMEM;
765}
766
767void enic_free_wq(void *txq)
768{
769	struct vnic_wq *wq;
770	struct enic *enic;
771
772	if (txq == NULL)
773		return;
774
775	wq = (struct vnic_wq *)txq;
776	enic = vnic_dev_priv(wq->vdev);
777	rte_memzone_free(wq->cqmsg_rz);
778	vnic_wq_free(wq);
779	vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
780}
781
782int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
783	unsigned int socket_id, uint16_t nb_desc)
784{
785	int err;
786	struct vnic_wq *wq = &enic->wq[queue_idx];
787	unsigned int cq_index = enic_cq_wq(enic, queue_idx);
788	char name[NAME_MAX];
789	static int instance;
790
791	wq->socket_id = socket_id;
792	if (nb_desc) {
793		if (nb_desc > enic->config.wq_desc_count) {
794			dev_warning(enic,
795				"WQ %d - number of tx desc in cmd line (%d)"\
796				"is greater than that in the UCSM/CIMC adapter"\
797				"policy.  Applying the value in the adapter "\
798				"policy (%d)\n",
799				queue_idx, nb_desc, enic->config.wq_desc_count);
800		} else if (nb_desc != enic->config.wq_desc_count) {
801			enic->config.wq_desc_count = nb_desc;
802			dev_info(enic,
803				"TX Queues - effective number of descs:%d\n",
804				nb_desc);
805		}
806	}
807
808	/* Allocate queue resources */
809	err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
810		enic->config.wq_desc_count,
811		sizeof(struct wq_enet_desc));
812	if (err) {
813		dev_err(enic, "error in allocation of wq\n");
814		return err;
815	}
816
817	err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
818		socket_id, enic->config.wq_desc_count,
819		sizeof(struct cq_enet_wq_desc));
820	if (err) {
821		vnic_wq_free(wq);
822		dev_err(enic, "error in allocation of cq for wq\n");
823	}
824
825	/* setup up CQ message */
826	snprintf((char *)name, sizeof(name),
827		 "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
828		instance++);
829
830	wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
831						   sizeof(uint32_t),
832						   SOCKET_ID_ANY, 0,
833						   ENIC_ALIGN);
834	if (!wq->cqmsg_rz)
835		return -ENOMEM;
836
837	return err;
838}
839
840int enic_disable(struct enic *enic)
841{
842	unsigned int i;
843	int err;
844
845	vnic_intr_mask(&enic->intr);
846	(void)vnic_intr_masked(&enic->intr); /* flush write */
847	rte_intr_disable(&enic->pdev->intr_handle);
848	rte_intr_callback_unregister(&enic->pdev->intr_handle,
849				     enic_intr_handler,
850				     (void *)enic->rte_dev);
851
852	vnic_dev_disable(enic->vdev);
853
854	enic_clsf_destroy(enic);
855
856	if (!enic_is_sriov_vf(enic))
857		vnic_dev_del_addr(enic->vdev, enic->mac_addr);
858
859	for (i = 0; i < enic->wq_count; i++) {
860		err = vnic_wq_disable(&enic->wq[i]);
861		if (err)
862			return err;
863	}
864	for (i = 0; i < enic_vnic_rq_count(enic); i++) {
865		if (enic->rq[i].in_use) {
866			err = vnic_rq_disable(&enic->rq[i]);
867			if (err)
868				return err;
869		}
870	}
871
872	/* If we were using interrupts, set the interrupt vector to -1
873	 * to disable interrupts.  We are not disabling link notifcations,
874	 * though, as we want the polling of link status to continue working.
875	 */
876	if (enic->rte_dev->data->dev_conf.intr_conf.lsc)
877		vnic_dev_notify_set(enic->vdev, -1);
878
879	vnic_dev_set_reset_flag(enic->vdev, 1);
880
881	for (i = 0; i < enic->wq_count; i++)
882		vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
883
884	for (i = 0; i < enic_vnic_rq_count(enic); i++)
885		if (enic->rq[i].in_use)
886			vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
887	for (i = 0; i < enic->cq_count; i++)
888		vnic_cq_clean(&enic->cq[i]);
889	vnic_intr_clean(&enic->intr);
890
891	return 0;
892}
893
894static int enic_dev_wait(struct vnic_dev *vdev,
895	int (*start)(struct vnic_dev *, int),
896	int (*finished)(struct vnic_dev *, int *),
897	int arg)
898{
899	int done;
900	int err;
901	int i;
902
903	err = start(vdev, arg);
904	if (err)
905		return err;
906
907	/* Wait for func to complete...2 seconds max */
908	for (i = 0; i < 2000; i++) {
909		err = finished(vdev, &done);
910		if (err)
911			return err;
912		if (done)
913			return 0;
914		usleep(1000);
915	}
916	return -ETIMEDOUT;
917}
918
919static int enic_dev_open(struct enic *enic)
920{
921	int err;
922
923	err = enic_dev_wait(enic->vdev, vnic_dev_open,
924		vnic_dev_open_done, 0);
925	if (err)
926		dev_err(enic_get_dev(enic),
927			"vNIC device open failed, err %d\n", err);
928
929	return err;
930}
931
932static int enic_set_rsskey(struct enic *enic)
933{
934	dma_addr_t rss_key_buf_pa;
935	union vnic_rss_key *rss_key_buf_va = NULL;
936	static union vnic_rss_key rss_key = {
937		.key = {
938			[0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
939			[1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
940			[2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
941			[3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
942		}
943	};
944	int err;
945	u8 name[NAME_MAX];
946
947	snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
948	rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
949		&rss_key_buf_pa, name);
950	if (!rss_key_buf_va)
951		return -ENOMEM;
952
953	rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
954
955	err = enic_set_rss_key(enic,
956		rss_key_buf_pa,
957		sizeof(union vnic_rss_key));
958
959	enic_free_consistent(enic, sizeof(union vnic_rss_key),
960		rss_key_buf_va, rss_key_buf_pa);
961
962	return err;
963}
964
965static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
966{
967	dma_addr_t rss_cpu_buf_pa;
968	union vnic_rss_cpu *rss_cpu_buf_va = NULL;
969	int i;
970	int err;
971	u8 name[NAME_MAX];
972
973	snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
974	rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
975		&rss_cpu_buf_pa, name);
976	if (!rss_cpu_buf_va)
977		return -ENOMEM;
978
979	for (i = 0; i < (1 << rss_hash_bits); i++)
980		(*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
981			enic_rte_rq_idx_to_sop_idx(i % enic->rq_count);
982
983	err = enic_set_rss_cpu(enic,
984		rss_cpu_buf_pa,
985		sizeof(union vnic_rss_cpu));
986
987	enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
988		rss_cpu_buf_va, rss_cpu_buf_pa);
989
990	return err;
991}
992
993static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
994	u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
995{
996	const u8 tso_ipid_split_en = 0;
997	int err;
998
999	/* Enable VLAN tag stripping */
1000
1001	err = enic_set_nic_cfg(enic,
1002		rss_default_cpu, rss_hash_type,
1003		rss_hash_bits, rss_base_cpu,
1004		rss_enable, tso_ipid_split_en,
1005		enic->ig_vlan_strip_en);
1006
1007	return err;
1008}
1009
1010int enic_set_rss_nic_cfg(struct enic *enic)
1011{
1012	const u8 rss_default_cpu = 0;
1013	const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1014	    NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1015	    NIC_CFG_RSS_HASH_TYPE_IPV6 |
1016	    NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1017	const u8 rss_hash_bits = 7;
1018	const u8 rss_base_cpu = 0;
1019	u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1020
1021	if (rss_enable) {
1022		if (!enic_set_rsskey(enic)) {
1023			if (enic_set_rsscpu(enic, rss_hash_bits)) {
1024				rss_enable = 0;
1025				dev_warning(enic, "RSS disabled, "\
1026					"Failed to set RSS cpu indirection table.");
1027			}
1028		} else {
1029			rss_enable = 0;
1030			dev_warning(enic,
1031				"RSS disabled, Failed to set RSS key.\n");
1032		}
1033	}
1034
1035	return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1036		rss_hash_bits, rss_base_cpu, rss_enable);
1037}
1038
1039int enic_setup_finish(struct enic *enic)
1040{
1041	int ret;
1042
1043	enic_init_soft_stats(enic);
1044
1045	ret = enic_set_rss_nic_cfg(enic);
1046	if (ret) {
1047		dev_err(enic, "Failed to config nic, aborting.\n");
1048		return -1;
1049	}
1050
1051	/* Default conf */
1052	vnic_dev_packet_filter(enic->vdev,
1053		1 /* directed  */,
1054		1 /* multicast */,
1055		1 /* broadcast */,
1056		0 /* promisc   */,
1057		1 /* allmulti  */);
1058
1059	enic->promisc = 0;
1060	enic->allmulti = 1;
1061
1062	return 0;
1063}
1064
1065void enic_add_packet_filter(struct enic *enic)
1066{
1067	/* Args -> directed, multicast, broadcast, promisc, allmulti */
1068	vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1069		enic->promisc, enic->allmulti);
1070}
1071
1072int enic_get_link_status(struct enic *enic)
1073{
1074	return vnic_dev_link_status(enic->vdev);
1075}
1076
1077static void enic_dev_deinit(struct enic *enic)
1078{
1079	struct rte_eth_dev *eth_dev = enic->rte_dev;
1080
1081	/* stop link status checking */
1082	vnic_dev_notify_unset(enic->vdev);
1083
1084	rte_free(eth_dev->data->mac_addrs);
1085}
1086
1087
1088int enic_set_vnic_res(struct enic *enic)
1089{
1090	struct rte_eth_dev *eth_dev = enic->rte_dev;
1091	int rc = 0;
1092
1093	/* With Rx scatter support, two RQs are now used per RQ used by
1094	 * the application.
1095	 */
1096	if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1097		dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1098			eth_dev->data->nb_rx_queues,
1099			eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1100		rc = -EINVAL;
1101	}
1102	if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1103		dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1104			eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1105		rc = -EINVAL;
1106	}
1107
1108	if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1109				   eth_dev->data->nb_tx_queues)) {
1110		dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1111			(eth_dev->data->nb_rx_queues +
1112			 eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1113		rc = -EINVAL;
1114	}
1115
1116	if (rc == 0) {
1117		enic->rq_count = eth_dev->data->nb_rx_queues;
1118		enic->wq_count = eth_dev->data->nb_tx_queues;
1119		enic->cq_count = enic->rq_count + enic->wq_count;
1120	}
1121
1122	return rc;
1123}
1124
1125/* Initialize the completion queue for an RQ */
1126static int
1127enic_reinit_rq(struct enic *enic, unsigned int rq_idx)
1128{
1129	struct vnic_rq *sop_rq, *data_rq;
1130	unsigned int cq_idx = enic_cq_rq(enic, rq_idx);
1131	int rc = 0;
1132
1133	sop_rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1134	data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx)];
1135
1136	vnic_cq_clean(&enic->cq[cq_idx]);
1137	vnic_cq_init(&enic->cq[cq_idx],
1138		     0 /* flow_control_enable */,
1139		     1 /* color_enable */,
1140		     0 /* cq_head */,
1141		     0 /* cq_tail */,
1142		     1 /* cq_tail_color */,
1143		     0 /* interrupt_enable */,
1144		     1 /* cq_entry_enable */,
1145		     0 /* cq_message_enable */,
1146		     0 /* interrupt offset */,
1147		     0 /* cq_message_addr */);
1148
1149
1150	vnic_rq_init_start(sop_rq, enic_cq_rq(enic,
1151			   enic_rte_rq_idx_to_sop_idx(rq_idx)), 0,
1152			   sop_rq->ring.desc_count - 1, 1, 0);
1153	if (data_rq->in_use) {
1154		vnic_rq_init_start(data_rq,
1155				   enic_cq_rq(enic,
1156				   enic_rte_rq_idx_to_data_idx(rq_idx)), 0,
1157				   data_rq->ring.desc_count - 1, 1, 0);
1158	}
1159
1160	rc = enic_alloc_rx_queue_mbufs(enic, sop_rq);
1161	if (rc)
1162		return rc;
1163
1164	if (data_rq->in_use) {
1165		rc = enic_alloc_rx_queue_mbufs(enic, data_rq);
1166		if (rc) {
1167			enic_rxmbuf_queue_release(enic, sop_rq);
1168			return rc;
1169		}
1170	}
1171
1172	return 0;
1173}
1174
1175/* The Cisco NIC can send and receive packets up to a max packet size
1176 * determined by the NIC type and firmware. There is also an MTU
1177 * configured into the NIC via the CIMC/UCSM management interface
1178 * which can be overridden by this function (up to the max packet size).
1179 * Depending on the network setup, doing so may cause packet drops
1180 * and unexpected behavior.
1181 */
1182int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1183{
1184	unsigned int rq_idx;
1185	struct vnic_rq *rq;
1186	int rc = 0;
1187	uint16_t old_mtu;	/* previous setting */
1188	uint16_t config_mtu;	/* Value configured into NIC via CIMC/UCSM */
1189	struct rte_eth_dev *eth_dev = enic->rte_dev;
1190
1191	old_mtu = eth_dev->data->mtu;
1192	config_mtu = enic->config.mtu;
1193
1194	if (new_mtu > enic->max_mtu) {
1195		dev_err(enic,
1196			"MTU not updated: requested (%u) greater than max (%u)\n",
1197			new_mtu, enic->max_mtu);
1198		return -EINVAL;
1199	}
1200	if (new_mtu < ENIC_MIN_MTU) {
1201		dev_info(enic,
1202			"MTU not updated: requested (%u) less than min (%u)\n",
1203			new_mtu, ENIC_MIN_MTU);
1204		return -EINVAL;
1205	}
1206	if (new_mtu > config_mtu)
1207		dev_warning(enic,
1208			"MTU (%u) is greater than value configured in NIC (%u)\n",
1209			new_mtu, config_mtu);
1210
1211	/* The easy case is when scatter is disabled. However if the MTU
1212	 * becomes greater than the mbuf data size, packet drops will ensue.
1213	 */
1214	if (!enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
1215		eth_dev->data->mtu = new_mtu;
1216		goto set_mtu_done;
1217	}
1218
1219	/* Rx scatter is enabled so reconfigure RQ's on the fly. The point is to
1220	 * change Rx scatter mode if necessary for better performance. I.e. if
1221	 * MTU was greater than the mbuf size and now it's less, scatter Rx
1222	 * doesn't have to be used and vice versa.
1223	  */
1224	rte_spinlock_lock(&enic->mtu_lock);
1225
1226	/* Stop traffic on all RQs */
1227	for (rq_idx = 0; rq_idx < enic->rq_count * 2; rq_idx++) {
1228		rq = &enic->rq[rq_idx];
1229		if (rq->is_sop && rq->in_use) {
1230			rc = enic_stop_rq(enic,
1231					  enic_sop_rq_idx_to_rte_idx(rq_idx));
1232			if (rc) {
1233				dev_err(enic, "Failed to stop Rq %u\n", rq_idx);
1234				goto set_mtu_done;
1235			}
1236		}
1237	}
1238
1239	/* replace Rx funciton with a no-op to avoid getting stale pkts */
1240	eth_dev->rx_pkt_burst = enic_dummy_recv_pkts;
1241	rte_mb();
1242
1243	/* Allow time for threads to exit the real Rx function. */
1244	usleep(100000);
1245
1246	/* now it is safe to reconfigure the RQs */
1247
1248	/* update the mtu */
1249	eth_dev->data->mtu = new_mtu;
1250
1251	/* free and reallocate RQs with the new MTU */
1252	for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1253		rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1254
1255		enic_free_rq(rq);
1256		rc = enic_alloc_rq(enic, rq_idx, rq->socket_id, rq->mp,
1257				   rq->tot_nb_desc, rq->rx_free_thresh);
1258		if (rc) {
1259			dev_err(enic,
1260				"Fatal MTU alloc error- No traffic will pass\n");
1261			goto set_mtu_done;
1262		}
1263
1264		rc = enic_reinit_rq(enic, rq_idx);
1265		if (rc) {
1266			dev_err(enic,
1267				"Fatal MTU RQ reinit- No traffic will pass\n");
1268			goto set_mtu_done;
1269		}
1270	}
1271
1272	/* put back the real receive function */
1273	rte_mb();
1274	eth_dev->rx_pkt_burst = enic_recv_pkts;
1275	rte_mb();
1276
1277	/* restart Rx traffic */
1278	for (rq_idx = 0; rq_idx < enic->rq_count; rq_idx++) {
1279		rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
1280		if (rq->is_sop && rq->in_use)
1281			enic_start_rq(enic, rq_idx);
1282	}
1283
1284set_mtu_done:
1285	dev_info(enic, "MTU changed from %u to %u\n",  old_mtu, new_mtu);
1286	rte_spinlock_unlock(&enic->mtu_lock);
1287	return rc;
1288}
1289
1290static int enic_dev_init(struct enic *enic)
1291{
1292	int err;
1293	struct rte_eth_dev *eth_dev = enic->rte_dev;
1294
1295	vnic_dev_intr_coal_timer_info_default(enic->vdev);
1296
1297	/* Get vNIC configuration
1298	*/
1299	err = enic_get_vnic_config(enic);
1300	if (err) {
1301		dev_err(dev, "Get vNIC configuration failed, aborting\n");
1302		return err;
1303	}
1304
1305	/* Get available resource counts */
1306	enic_get_res_counts(enic);
1307	if (enic->conf_rq_count == 1) {
1308		dev_err(enic, "Running with only 1 RQ configured in the vNIC is not supported.\n");
1309		dev_err(enic, "Please configure 2 RQs in the vNIC for each Rx queue used by DPDK.\n");
1310		dev_err(enic, "See the ENIC PMD guide for more information.\n");
1311		return -EINVAL;
1312	}
1313
1314	/* Get the supported filters */
1315	enic_fdir_info(enic);
1316
1317	eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN
1318						* ENIC_MAX_MAC_ADDR, 0);
1319	if (!eth_dev->data->mac_addrs) {
1320		dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1321		return -1;
1322	}
1323	ether_addr_copy((struct ether_addr *) enic->mac_addr,
1324			eth_dev->data->mac_addrs);
1325
1326	vnic_dev_set_reset_flag(enic->vdev, 0);
1327
1328	/* set up link status checking */
1329	vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
1330
1331	return 0;
1332
1333}
1334
1335int enic_probe(struct enic *enic)
1336{
1337	struct rte_pci_device *pdev = enic->pdev;
1338	int err = -1;
1339
1340	dev_debug(enic, " Initializing ENIC PMD\n");
1341
1342	enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1343	enic->bar0.len = pdev->mem_resource[0].len;
1344
1345	/* Register vNIC device */
1346	enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1347	if (!enic->vdev) {
1348		dev_err(enic, "vNIC registration failed, aborting\n");
1349		goto err_out;
1350	}
1351
1352	LIST_INIT(&enic->memzone_list);
1353	rte_spinlock_init(&enic->memzone_list_lock);
1354
1355	vnic_register_cbacks(enic->vdev,
1356		enic_alloc_consistent,
1357		enic_free_consistent);
1358
1359	/* Issue device open to get device in known state */
1360	err = enic_dev_open(enic);
1361	if (err) {
1362		dev_err(enic, "vNIC dev open failed, aborting\n");
1363		goto err_out_unregister;
1364	}
1365
1366	/* Set ingress vlan rewrite mode before vnic initialization */
1367	err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1368		IG_VLAN_REWRITE_MODE_PASS_THRU);
1369	if (err) {
1370		dev_err(enic,
1371			"Failed to set ingress vlan rewrite mode, aborting.\n");
1372		goto err_out_dev_close;
1373	}
1374
1375	/* Issue device init to initialize the vnic-to-switch link.
1376	 * We'll start with carrier off and wait for link UP
1377	 * notification later to turn on carrier.  We don't need
1378	 * to wait here for the vnic-to-switch link initialization
1379	 * to complete; link UP notification is the indication that
1380	 * the process is complete.
1381	 */
1382
1383	err = vnic_dev_init(enic->vdev, 0);
1384	if (err) {
1385		dev_err(enic, "vNIC dev init failed, aborting\n");
1386		goto err_out_dev_close;
1387	}
1388
1389	err = enic_dev_init(enic);
1390	if (err) {
1391		dev_err(enic, "Device initialization failed, aborting\n");
1392		goto err_out_dev_close;
1393	}
1394
1395	return 0;
1396
1397err_out_dev_close:
1398	vnic_dev_close(enic->vdev);
1399err_out_unregister:
1400	vnic_dev_unregister(enic->vdev);
1401err_out:
1402	return err;
1403}
1404
1405void enic_remove(struct enic *enic)
1406{
1407	enic_dev_deinit(enic);
1408	vnic_dev_close(enic->vdev);
1409	vnic_dev_unregister(enic->vdev);
1410}
1411