mlx5_defs.h revision 2aab4c31
1/*-
2 *   BSD LICENSE
3 *
4 *   Copyright 2015 6WIND S.A.
5 *   Copyright 2015 Mellanox.
6 *
7 *   Redistribution and use in source and binary forms, with or without
8 *   modification, are permitted provided that the following conditions
9 *   are met:
10 *
11 *     * Redistributions of source code must retain the above copyright
12 *       notice, this list of conditions and the following disclaimer.
13 *     * Redistributions in binary form must reproduce the above copyright
14 *       notice, this list of conditions and the following disclaimer in
15 *       the documentation and/or other materials provided with the
16 *       distribution.
17 *     * Neither the name of 6WIND S.A. nor the names of its
18 *       contributors may be used to endorse or promote products derived
19 *       from this software without specific prior written permission.
20 *
21 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34#ifndef RTE_PMD_MLX5_DEFS_H_
35#define RTE_PMD_MLX5_DEFS_H_
36
37#include "mlx5_autoconf.h"
38
39/* Reported driver name. */
40#define MLX5_DRIVER_NAME "net_mlx5"
41
42/* Maximum number of simultaneous MAC addresses. */
43#define MLX5_MAX_MAC_ADDRESSES 128
44
45/* Maximum number of simultaneous VLAN filters. */
46#define MLX5_MAX_VLAN_IDS 128
47
48/* Maximum number of special flows. */
49#define MLX5_MAX_SPECIAL_FLOWS 4
50
51/*
52 * Request TX completion every time descriptors reach this threshold since
53 * the previous request. Must be a power of two for performance reasons.
54 */
55#define MLX5_TX_COMP_THRESH 32
56
57/* RSS Indirection table size. */
58#define RSS_INDIRECTION_TABLE_SIZE 256
59
60/*
61 * Maximum number of cached Memory Pools (MPs) per TX queue. Each RTE MP
62 * from which buffers are to be transmitted will have to be mapped by this
63 * driver to their own Memory Region (MR). This is a slow operation.
64 *
65 * This value is always 1 for RX queues.
66 */
67#ifndef MLX5_PMD_TX_MP_CACHE
68#define MLX5_PMD_TX_MP_CACHE 8
69#endif
70
71/*
72 * If defined, only use software counters. The PMD will never ask the hardware
73 * for these, and many of them won't be available.
74 */
75#ifndef MLX5_PMD_SOFT_COUNTERS
76#define MLX5_PMD_SOFT_COUNTERS 1
77#endif
78
79/* Alarm timeout. */
80#define MLX5_ALARM_TIMEOUT_US 100000
81
82
83//#ifdef TREX_PATCH_DPDK PATH for DPDK16.11 should be removed
84
85/**
86 * Mask of bits used to determine the status of RX IP checksum.
87 * - PKT_RX_IP_CKSUM_UNKNOWN: no information about the RX IP checksum
88 * - PKT_RX_IP_CKSUM_BAD: the IP checksum in the packet is wrong
89 * - PKT_RX_IP_CKSUM_GOOD: the IP checksum in the packet is valid
90 * - PKT_RX_IP_CKSUM_NONE: the IP checksum is not correct in the packet
91 *   data, but the integrity of the IP header is verified.
92 */
93#define PKT_RX_IP_CKSUM_MASK ((1ULL << 4) | (1ULL << 7))
94
95#define PKT_RX_IP_CKSUM_UNKNOWN 0
96#define PKT_RX_IP_CKSUM_BAD     (1ULL << 4)
97#define PKT_RX_IP_CKSUM_GOOD    (1ULL << 7)
98#define PKT_RX_IP_CKSUM_NONE    ((1ULL << 4) | (1ULL << 7))
99
100/**
101 * Mask of bits used to determine the status of RX L4 checksum.
102 * - PKT_RX_L4_CKSUM_UNKNOWN: no information about the RX L4 checksum
103 * - PKT_RX_L4_CKSUM_BAD: the L4 checksum in the packet is wrong
104 * - PKT_RX_L4_CKSUM_GOOD: the L4 checksum in the packet is valid
105 * - PKT_RX_L4_CKSUM_NONE: the L4 checksum is not correct in the packet
106 *   data, but the integrity of the L4 data is verified.
107 */
108#define PKT_RX_L4_CKSUM_MASK ((1ULL << 3) | (1ULL << 8))
109
110#define PKT_RX_L4_CKSUM_UNKNOWN 0
111#define PKT_RX_L4_CKSUM_BAD     (1ULL << 3)
112#define PKT_RX_L4_CKSUM_GOOD    (1ULL << 8)
113#define PKT_RX_L4_CKSUM_NONE    ((1ULL << 3) | (1ULL << 8))
114
115
116//#endif
117
118
119#endif /* RTE_PMD_MLX5_DEFS_H_ */
120